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authorCédric Le Goater <clg@kaod.org>2017-12-15 14:56:01 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2018-01-10 12:53:00 +1100
commitb168a138a8bc9c18e8140fef614a6b66721497fb (patch)
treea65296e00934abd21702f02a7a3387014972be5d /hw/ppc/pnv_core.c
parenta9dd6604a663d1a88e5cf6b1446d6a1202c3334d (diff)
ppc/pnv: change powernv_ prefix to pnv_ for overall naming consistency
The 'pnv' prefix is now used for all and the routines populating the device tree start with 'pnv_dt'. The handler of the PnvXScomInterface is also renamed to 'dt_xscom' which should reflect that it is populating the device tree under the 'xscom@' node of the chip. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/pnv_core.c')
-rw-r--r--hw/ppc/pnv_core.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 03317db853..7e8a76df44 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -37,7 +37,7 @@ static const char *pnv_core_cpu_typename(PnvCore *pc)
return cpu_type;
}
-static void powernv_cpu_reset(void *opaque)
+static void pnv_cpu_reset(void *opaque)
{
PowerPCCPU *cpu = opaque;
CPUState *cs = CPU(cpu);
@@ -54,7 +54,7 @@ static void powernv_cpu_reset(void *opaque)
env->msr |= MSR_HVB; /* Hypervisor mode */
}
-static void powernv_cpu_init(PowerPCCPU *cpu, Error **errp)
+static void pnv_cpu_init(PowerPCCPU *cpu, Error **errp)
{
CPUPPCState *env = &cpu->env;
int core_pir;
@@ -73,7 +73,7 @@ static void powernv_cpu_init(PowerPCCPU *cpu, Error **errp)
/* Set time-base frequency to 512 MHz */
cpu_ppc_tb_init(env, PNV_TIMEBASE_FREQ);
- qemu_register_reset(powernv_cpu_reset, cpu);
+ qemu_register_reset(pnv_cpu_reset, cpu);
}
/*
@@ -139,7 +139,7 @@ static void pnv_core_realize_child(Object *child, XICSFabric *xi, Error **errp)
return;
}
- powernv_cpu_init(cpu, &local_err);
+ pnv_cpu_init(cpu, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;