diff options
| author | Cédric Le Goater <clg@kaod.org> | 2020-01-27 15:41:54 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2020-02-02 14:07:57 +1100 |
| commit | 08c3f3a734dae32497d526e26522d75f85d6368e (patch) | |
| tree | 87d899d3330db034e49303f67d481be72410616a /hw/ppc/pnv_core.c | |
| parent | 59942f0ebbdae67640bfa964c7745e88a80c35a0 (diff) | |
ppc/pnv: Add support for "hostboot" mode
When the "hb-mode" option is activated on the powernv machine, the
firmware is mapped at 0x8000000 and the HRMOR of the HW threads are
set to the same address.
The PNOR mapping on the FW address space of the LPC bus is left enabled
to let the firmware load any other images required to boot the host.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20200127144154.10170-4-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/pnv_core.c')
| -rw-r--r-- | hw/ppc/pnv_core.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 5fe3f21e12..f7247222bc 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -56,6 +56,8 @@ static void pnv_core_cpu_reset(PnvCore *pc, PowerPCCPU *cpu) env->nip = 0x10; env->msr |= MSR_HVB; /* Hypervisor mode */ + env->spr[SPR_HRMOR] = pc->hrmor; + pcc->intc_reset(pc->chip, cpu); } @@ -289,6 +291,7 @@ static void pnv_core_unrealize(DeviceState *dev, Error **errp) static Property pnv_core_properties[] = { DEFINE_PROP_UINT32("pir", PnvCore, pir, 0), + DEFINE_PROP_UINT64("hrmor", PnvCore, hrmor, 0), DEFINE_PROP_LINK("chip", PnvCore, chip, TYPE_PNV_CHIP, PnvChip *), DEFINE_PROP_END_OF_LIST(), }; |