diff options
| author | Cédric Le Goater <clg@kaod.org> | 2021-01-26 18:10:59 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-02-10 10:43:50 +1100 |
| commit | 032c226bc6de2be0d5c88940ca7534a80cf0dd1a (patch) | |
| tree | d8160762feea34ae09af0f2974c79487943449a8 /hw/ppc/pnv.c | |
| parent | 8304ab79054fd96ba0b8bd5ba14aa5100b01c212 (diff) | |
ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR
This to map the PNOR from the machine init handler directly and finish
the cleanup of the LPC model.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210126171059.307867-8-clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/pnv.c')
| -rw-r--r-- | hw/ppc/pnv.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index e500c2e243..50810df838 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -872,6 +872,14 @@ static void pnv_init(MachineState *machine) } /* + * The PNOR is mapped on the LPC FW address space by the BMC. + * Since we can not reach the remote BMC machine with LPC memops, + * map it always for now. + */ + memory_region_add_subregion(pnv->chips[0]->fw_mr, PNOR_SPI_OFFSET, + &pnv->pnor->mmio); + + /* * OpenPOWER systems use a IPMI SEL Event message to notify the * host to powerdown */ @@ -1150,6 +1158,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) qdev_realize(DEVICE(&chip8->lpc), NULL, &error_fatal); pnv_xscom_add_subregion(chip, PNV_XSCOM_LPC_BASE, &chip8->lpc.xscom_regs); + chip->fw_mr = &chip8->lpc.isa_fw; chip->dt_isa_nodename = g_strdup_printf("/xscom@%" PRIx64 "/isa@%x", (uint64_t) PNV_XSCOM_BASE(chip), PNV_XSCOM_LPC_BASE); @@ -1479,6 +1488,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) memory_region_add_subregion(get_system_memory(), PNV9_LPCM_BASE(chip), &chip9->lpc.xscom_regs); + chip->fw_mr = &chip9->lpc.isa_fw; chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0", (uint64_t) PNV9_LPCM_BASE(chip)); @@ -1592,6 +1602,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) memory_region_add_subregion(get_system_memory(), PNV10_LPCM_BASE(chip), &chip10->lpc.xscom_regs); + chip->fw_mr = &chip10->lpc.isa_fw; chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0", (uint64_t) PNV10_LPCM_BASE(chip)); } |