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| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-04-22 20:37:43 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-04-22 20:37:43 +0000 |
| commit | 0ba5f006bb143ea5ef5cac1746f52bbbf529c836 (patch) | |
| tree | fd1ef9fb03d26f03a6846c8665617a5b16e3ee94 /hw/piix_pci.c | |
| parent | 967032c3d5547a9973465f495f8f25e3c7967633 (diff) | |
x86/x86-64 MMU PAE fixes
This patch fixes MMU emulation in PAE mode for > 4GB physical addresses:
- a20_mask should have the correct size to not clear the high part of
the addresses.
- PHYS_ADDR_MASK should not clear the high part of the addresses.
- pdpe, pde and pte could be located anywhere in memory on x86-64, but
only in the first 4GB on x86, define their pointer to as target_ulong.
- pml4e_addr could be located anywhere in memory, define its pointer
as uint64_t.
- paddr represents a physical address and thus should be of type
target_phys_addr_t.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4239 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/piix_pci.c')
0 files changed, 0 insertions, 0 deletions