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authorBlue Swirl <blauwirbel@gmail.com>2013-04-06 12:53:54 +0000
committerBlue Swirl <blauwirbel@gmail.com>2013-04-06 12:53:54 +0000
commit9196dd411d580c27f85daa209ff9a501d719ebc0 (patch)
tree48f15e89b2be219c1d106328c044d250b2f9cb05 /hw/pflash_cfi01.c
parent893986fe94eb229f2317f50fac0e35e068eb66ba (diff)
parent32aea752f47f30c00878dcc323ac4debf0c9e645 (diff)
Merge branch 'arm-devs.next' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.next' of git://git.linaro.org/people/pmaydell/qemu-arm: hw/nand.c: Fix nand erase operation cadence_uart: Flush queued characters on reset pl330: Don't inhibit ES bits on INTEN pflash_cfi01: Implement migration support pflash_cfi01: Drop unused 'bypass' field hw/arm_gic_common: Use vmstate struct rather than save/load functions arm_gic: Fix sizes of state fields in preparation for vmstate support vmstate: Add support for two dimensional arrays hw/onenand.c: fix migration of dynamically allocated buffer "otp" hw/sd.c: fix migration of dynamically allocated buffer "buf" vmstate.h: introduce VMSTATE_BUFFER_POINTER_UNSAFE macro hw/arm_mptimer: Save the timer state pl050: Don't send always-constant is_mouse field hw/arm/nseries: don't print to stdout or stderr
Diffstat (limited to 'hw/pflash_cfi01.c')
-rw-r--r--hw/pflash_cfi01.c30
1 files changed, 19 insertions, 11 deletions
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index 5d57babe07..646dc794bf 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -67,8 +67,7 @@ struct pflash_t {
uint64_t sector_len;
uint8_t width;
uint8_t be;
- int wcycle; /* if 0, the flash is read normally */
- int bypass;
+ uint8_t wcycle; /* if 0, the flash is read normally */
int ro;
uint8_t cmd;
uint8_t status;
@@ -78,7 +77,7 @@ struct pflash_t {
uint16_t ident3;
uint8_t cfi_len;
uint8_t cfi_table[0x52];
- hwaddr counter;
+ uint64_t counter;
unsigned int writeblock_size;
QEMUTimer *timer;
MemoryRegion mem;
@@ -86,6 +85,19 @@ struct pflash_t {
void *storage;
};
+static const VMStateDescription vmstate_pflash = {
+ .name = "pflash_cfi01",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT8(wcycle, pflash_t),
+ VMSTATE_UINT8(cmd, pflash_t),
+ VMSTATE_UINT8(status, pflash_t),
+ VMSTATE_UINT64(counter, pflash_t),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static void pflash_timer (void *opaque)
{
pflash_t *pfl = opaque;
@@ -93,12 +105,8 @@ static void pflash_timer (void *opaque)
DPRINTF("%s: command %02x done\n", __func__, pfl->cmd);
/* Reset flash */
pfl->status ^= 0x80;
- if (pfl->bypass) {
- pfl->wcycle = 2;
- } else {
- memory_region_rom_device_set_readable(&pfl->mem, true);
- pfl->wcycle = 0;
- }
+ memory_region_rom_device_set_readable(&pfl->mem, true);
+ pfl->wcycle = 0;
pfl->cmd = 0;
}
@@ -228,7 +236,7 @@ static inline void pflash_data_write(pflash_t *pfl, hwaddr offset,
uint8_t *p = pfl->storage;
DPRINTF("%s: block write offset " TARGET_FMT_plx
- " value %x counter " TARGET_FMT_plx "\n",
+ " value %x counter %016" PRIx64 "\n",
__func__, offset, value, pfl->counter);
switch (width) {
case 1:
@@ -452,7 +460,6 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
reset_flash:
memory_region_rom_device_set_readable(&pfl->mem, true);
- pfl->bypass = 0;
pfl->wcycle = 0;
pfl->cmd = 0;
}
@@ -707,6 +714,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
k->init = pflash_cfi01_init;
dc->props = pflash_cfi01_properties;
+ dc->vmsd = &vmstate_pflash;
}