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authorMichael S. Tsirkin <mst@redhat.com>2011-09-04 16:50:55 +0300
committerMichael S. Tsirkin <mst@redhat.com>2011-09-19 21:22:30 +0300
commit7df32ca08ad0afdac623e43a99984c26177468f0 (patch)
tree971c4a48a90fc03a1ae3b3c743fd59d8bbbc1907 /hw/pci_bridge.c
parent778d1799397e1353b69f16547d359f944fb49ea6 (diff)
pci: implement bridge filtering
Support bridge filtering on top of the memory API as suggested by Avi Kivity: Create a memory region for the bridge's address space. This region is not directly added to system_memory or its descendants. Devices under the bridge see this region as its pci_address_space(). The region is as large as the entire address space - it does not take into account any windows. For each of the three windows (pref, non-pref, vga), create an alias with the appropriate start and size. Map the alias into the bridge's parent's pci_address_space(), as subregions. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci_bridge.c')
-rw-r--r--hw/pci_bridge.c92
1 files changed, 86 insertions, 6 deletions
diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c
index e0b339edb0..25e9b7c227 100644
--- a/hw/pci_bridge.c
+++ b/hw/pci_bridge.c
@@ -135,6 +135,77 @@ pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type)
return limit;
}
+static void pci_bridge_init_alias(PCIBridge *bridge, MemoryRegion *alias,
+ uint8_t type, const char *name,
+ MemoryRegion *space,
+ MemoryRegion *parent_space,
+ bool enabled)
+{
+ pcibus_t base = pci_bridge_get_base(&bridge->dev, type);
+ pcibus_t limit = pci_bridge_get_limit(&bridge->dev, type);
+ /* TODO: this doesn't handle base = 0 limit = 2^64 - 1 correctly.
+ * Apparently no way to do this with existing memory APIs. */
+ pcibus_t size = enabled && limit >= base ? limit + 1 - base : 0;
+
+ memory_region_init_alias(alias, name, space, base, size);
+ memory_region_add_subregion_overlap(parent_space, base, alias, 1);
+}
+
+static void pci_bridge_cleanup_alias(MemoryRegion *alias,
+ MemoryRegion *parent_space)
+{
+ memory_region_del_subregion(parent_space, alias);
+ memory_region_destroy(alias);
+}
+
+static void pci_bridge_region_init(PCIBridge *br)
+{
+ PCIBus *sec_bus = &br->sec_bus;
+ PCIBus *parent = br->dev.bus;
+ uint16_t cmd = pci_get_word(br->dev.config + PCI_COMMAND);
+
+ pci_bridge_init_alias(br, &br->alias_pref_mem,
+ PCI_BASE_ADDRESS_MEM_PREFETCH,
+ "pci_bridge_pref_mem",
+ sec_bus->address_space_mem,
+ parent->address_space_mem,
+ cmd & PCI_COMMAND_MEMORY);
+ pci_bridge_init_alias(br, &br->alias_mem,
+ PCI_BASE_ADDRESS_SPACE_MEMORY,
+ "pci_bridge_mem",
+ sec_bus->address_space_mem,
+ parent->address_space_mem,
+ cmd & PCI_COMMAND_MEMORY);
+ pci_bridge_init_alias(br, &br->alias_io,
+ PCI_BASE_ADDRESS_SPACE_IO,
+ "pci_bridge_io",
+ sec_bus->address_space_io,
+ parent->address_space_io,
+ cmd & PCI_COMMAND_IO);
+ /* TODO: optinal VGA and VGA palette snooping support. */
+}
+
+static void pci_bridge_region_cleanup(PCIBridge *br)
+{
+ PCIBus *parent = br->dev.bus;
+ pci_bridge_cleanup_alias(&br->alias_io,
+ parent->address_space_io);
+ pci_bridge_cleanup_alias(&br->alias_mem,
+ parent->address_space_mem);
+ pci_bridge_cleanup_alias(&br->alias_pref_mem,
+ parent->address_space_mem);
+}
+
+static void pci_bridge_update_mappings(PCIBridge *br)
+{
+ /* Make updates atomic to: handle the case of one VCPU updating the bridge
+ * while another accesses an unaffected region. */
+ memory_region_transaction_begin();
+ pci_bridge_region_cleanup(br);
+ pci_bridge_region_init(br);
+ memory_region_transaction_commit();
+}
+
/* default write_config function for PCI-to-PCI bridge */
void pci_bridge_write_config(PCIDevice *d,
uint32_t address, uint32_t val, int len)
@@ -145,13 +216,15 @@ void pci_bridge_write_config(PCIDevice *d,
pci_default_write_config(d, address, val, len);
- if (/* io base/limit */
+ if (ranges_overlap(address, len, PCI_COMMAND, 2) ||
+
+ /* io base/limit */
ranges_overlap(address, len, PCI_IO_BASE, 2) ||
/* memory base/limit, prefetchable base/limit and
io base/limit upper 16 */
ranges_overlap(address, len, PCI_MEMORY_BASE, 20)) {
- pci_bridge_update_mappings(&s->sec_bus);
+ pci_bridge_update_mappings(s);
}
newctl = pci_get_word(d->config + PCI_BRIDGE_CONTROL);
@@ -246,10 +319,11 @@ int pci_bridge_initfn(PCIDevice *dev)
br->bus_name);
sec_bus->parent_dev = dev;
sec_bus->map_irq = br->map_irq;
- /* TODO: use memory API to perform memory filtering. */
- sec_bus->address_space_mem = parent->address_space_mem;
- sec_bus->address_space_io = parent->address_space_io;
-
+ sec_bus->address_space_mem = g_new(MemoryRegion, 1);
+ memory_region_init(sec_bus->address_space_mem, "pci_pridge_pci", INT64_MAX);
+ sec_bus->address_space_io = g_new(MemoryRegion, 1);
+ memory_region_init(sec_bus->address_space_io, "pci_bridge_io", 65536);
+ pci_bridge_region_init(br);
QLIST_INIT(&sec_bus->child);
QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling);
return 0;
@@ -259,8 +333,14 @@ int pci_bridge_initfn(PCIDevice *dev)
int pci_bridge_exitfn(PCIDevice *pci_dev)
{
PCIBridge *s = DO_UPCAST(PCIBridge, dev, pci_dev);
+ PCIBus *sec_bus = &s->sec_bus;
assert(QLIST_EMPTY(&s->sec_bus.child));
QLIST_REMOVE(&s->sec_bus, sibling);
+ pci_bridge_region_cleanup(s);
+ memory_region_destroy(sec_bus->address_space_mem);
+ g_free(sec_bus->address_space_mem);
+ memory_region_destroy(sec_bus->address_space_io);
+ g_free(sec_bus->address_space_io);
/* qbus_free() is called automatically by qdev_free() */
return 0;
}