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authorMatt Redfearn <matt.redfearn@imgtec.com>2017-08-15 15:44:17 +0100
committerMichael S. Tsirkin <mst@redhat.com>2017-10-15 05:54:42 +0300
commita6c242aaf52409ea827665e6f5f84b446d17a859 (patch)
tree7909ea8dc3510975608be26cf5369d3a5f6c61dd /hw/pci
parentb81b948ecc8659d78066f374c787ed12379d21dd (diff)
PCI: PCIe access should always be little endian
PCIe busses are always little endian, so set the endianness of the memory region to little endian rather than native such that operations work as expected on big endian targets. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci')
-rw-r--r--hw/pci/pcie_host.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c
index dcebf57ed4..553db56778 100644
--- a/hw/pci/pcie_host.c
+++ b/hw/pci/pcie_host.c
@@ -81,7 +81,7 @@ static uint64_t pcie_mmcfg_data_read(void *opaque,
static const MemoryRegionOps pcie_mmcfg_ops = {
.read = pcie_mmcfg_data_read,
.write = pcie_mmcfg_data_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static void pcie_host_init(Object *obj)