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authorIsaku Yamahata <yamahata@valinux.co.jp>2009-10-30 21:21:11 +0900
committerAnthony Liguori <aliguori@us.ibm.com>2009-11-09 08:43:09 -0600
commit1442125843baabc053b71684c85ddb02b9080d6c (patch)
tree13dccdda97ea7c2085da6e14da448de8b692067d /hw/pci.h
parent4f8589e11558f1151d95a4a3e9fce902f042df3d (diff)
pci: 64bit bar support.
implemented pci 64bit bar support. The tricky bit is pci_update_mapping(). An OS is allowed to set the BAR such that OS can't address the area pointed by BAR. It doesn't make sense, though. In that case, don't map the BAR. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/pci.h')
-rw-r--r--hw/pci.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/pci.h b/hw/pci.h
index 305c030f9c..e83faf598d 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -114,6 +114,7 @@ typedef struct PCIIORegion {
#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
#define PCI_BASE_ADDRESS_SPACE_IO 0x01
#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
+#define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */
#define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */
#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */
#define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */