PCI: fix bridge configuration

PCI bridges' qdev info structures must indicate bridge header type,
otherwise critical bridge registers (esp. PCI_PRIMARY_BUS,
PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS) will not be writable.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/hw/pci.c b/hw/pci.c
index b83fd532bc..023f7b6f4a 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1874,6 +1874,7 @@ static PCIDeviceInfo bridge_info = {
     .init         = pci_bridge_initfn,
     .exit         = pci_bridge_exitfn,
     .config_write = pci_bridge_write_config,
+    .header_type  = PCI_HEADER_TYPE_BRIDGE,
     .qdev.props   = (Property[]) {
         DEFINE_PROP_HEX32("vendorid", PCIBridge, vid, 0),
         DEFINE_PROP_HEX32("deviceid", PCIBridge, did, 0),