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authorPeter Maydell <peter.maydell@linaro.org>2021-01-05 21:06:42 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-01-05 21:06:42 +0000
commit2e0b5bbe813930021b2baab03c9d424c1c52d18b (patch)
treed5e5ccd86c2c9b60cf5405f82bf34a99f4590abe /hw/pci-host
parent52d25464605dc20022ad94aa8bc8e8473e600833 (diff)
parent457027298749333047bf81a856ce95ea5f9dccd9 (diff)
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210104' into staging
MIPS patches queue - Use PCI macros (Philippe Mathieu-Daudé) - Clean up VT82C686B south bridge (BALATON Zoltan) - Introduce clock_ticks_to_ns() (Peter Maydell) - Add Loongson-3 machine (Huacai Chen) - Make addresses used by bootloader unsigned (Jiaxun Yang) - Clean fuloong2e PROM environment (Jiaxun Yang) - Add integration test of fuloong2e booting Linux (Jiaxun Yang) # gpg: Signature made Mon 04 Jan 2021 22:37:48 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-20210104: (35 commits) tests/acceptance: Test boot_linux_console for fuloong2e hw/mips/fuloong2e: Correct cpuclock in PROM environment hw/mips/fuloong2e: Remove unused env entry hw/mips/fuloong2e: Replace faulty documentation links hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT hw/mips: Use address translation helper to handle ENVP_ADDR hw/mips/malta: Use address translation helper to calculate bootloader_run_addr hw/mips: Make bootloader addresses unsigned docs/system: Update MIPS machine documentation hw/mips: Add Loongson-3 machine support hw/mips: Add Loongson-3 boot parameter helpers hw/mips: Implement fw_cfg_arch_key_name() hw/intc: Rework Loongson LIOINTC clock: Define and use new clock_display_freq() clock: Remove clock_get_ns() target/mips: Don't use clock_get_ns() in clock period calculation clock: Introduce clock_ticks_to_ns() vt82c686: Rename superio config related parts vt82c686: Use shorter name for local variable holding object state vt82c686: Remove unneeded includes and defines ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-host')
-rw-r--r--hw/pci-host/bonito.c14
-rw-r--r--hw/pci-host/pnv_phb4.c2
-rw-r--r--hw/pci-host/ppce500.c2
-rw-r--r--hw/pci-host/uninorth.c8
4 files changed, 12 insertions, 14 deletions
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index a99eced065..2a2db7cea6 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -196,8 +196,7 @@ FIELD(BONGENCFG, PCIQUEUE, 12, 1)
#define PCI_IDSEL_VIA686B (1 << PCI_IDSEL_VIA686B_BIT)
#define PCI_ADDR(busno , devno , funno , regno) \
- ((((busno) << 16) & 0xff0000) + (((devno) << 11) & 0xf800) + \
- (((funno) << 8) & 0x700) + (regno))
+ ((PCI_BUILD_BDF(busno, PCI_DEVFN(devno , funno)) << 8) + (regno))
typedef struct BonitoState BonitoState;
@@ -469,8 +468,8 @@ static uint32_t bonito_sbridge_pciaddr(void *opaque, hwaddr addr)
regno = (cfgaddr & BONITO_PCICONF_REG_MASK) >> BONITO_PCICONF_REG_OFFSET;
if (idsel == 0) {
- error_report("error in bonito pci config address " TARGET_FMT_plx
- ",pcimap_cfg=%x", addr, s->regs[BONITO_PCIMAP_CFG]);
+ error_report("error in bonito pci config address 0x" TARGET_FMT_plx
+ ",pcimap_cfg=0x%x", addr, s->regs[BONITO_PCIMAP_CFG]);
exit(1);
}
pciaddr = PCI_ADDR(pci_bus_num(phb->bus), devno, funno, regno);
@@ -571,7 +570,7 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
{
int slot;
- slot = (pci_dev->devfn >> 3);
+ slot = PCI_SLOT(pci_dev->devfn);
switch (slot) {
case 5: /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
@@ -632,7 +631,7 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
phb->bus = pci_register_root_bus(dev, "pci",
pci_bonito_set_irq, pci_bonito_map_irq,
dev, &bs->pci_mem, get_system_io(),
- 0x28, 32, TYPE_PCI_BUS);
+ PCI_DEVFN(5, 0), 32, TYPE_PCI_BUS);
for (size_t i = 0; i < 3; i++) {
char *name = g_strdup_printf("pci.lomem%zu", i);
@@ -729,7 +728,8 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
pci_set_word(dev->config + PCI_SUBSYSTEM_ID, 0x0000);
pci_set_byte(dev->config + PCI_INTERRUPT_LINE, 0x00);
- pci_set_byte(dev->config + PCI_INTERRUPT_PIN, 0x01);
+ pci_config_set_interrupt_pin(dev->config, 0x01); /* interrupt pin A */
+
pci_set_byte(dev->config + PCI_MIN_GNT, 0x3c);
pci_set_byte(dev->config + PCI_MAX_LAT, 0x00);
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 03daf40a23..6328e985f8 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -889,7 +889,7 @@ static bool pnv_phb4_resolve_pe(PnvPhb4DMASpace *ds)
/* Read RTE */
bus_num = pci_bus_num(ds->bus);
addr = rtt & PHB_RTT_BASE_ADDRESS_MASK;
- addr += 2 * ((bus_num << 8) | ds->devfn);
+ addr += 2 * PCI_BUILD_BDF(bus_num, ds->devfn);
if (dma_memory_read(&address_space_memory, addr, &rte, sizeof(rte))) {
phb_error(ds->phb, "Failed to read RTT entry at 0x%"PRIx64, addr);
/* Set error bits ? fence ? ... */
diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
index 9517aab913..5ad1424b31 100644
--- a/hw/pci-host/ppce500.c
+++ b/hw/pci-host/ppce500.c
@@ -342,7 +342,7 @@ static const MemoryRegionOps e500_pci_reg_ops = {
static int mpc85xx_pci_map_irq(PCIDevice *pci_dev, int pin)
{
- int devno = pci_dev->devfn >> 3;
+ int devno = PCI_SLOT(pci_dev->devfn);
int ret;
ret = ppce500_pci_map_irq_slot(devno, pin);
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 0c0a9ecee1..d25b62d6a5 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -63,15 +63,13 @@ static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr)
if (slot == 32) {
slot = -1; /* XXX: should this be 0? */
}
- func = (reg >> 8) & 7;
+ func = PCI_FUNC(reg >> 8);
/* ... and then convert them to x86 format */
/* config pointer */
retval = (reg & (0xff - 7)) | (addr & 7);
- /* slot */
- retval |= slot << 11;
- /* fn */
- retval |= func << 8;
+ /* slot, fn */
+ retval |= PCI_DEVFN(slot, func) << 8;
}
trace_unin_get_config_reg(reg, addr, retval);