diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2018-09-25 09:27:10 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-09-25 09:27:10 +0100 |
| commit | 5b9000b52fba08a567f8efaa4aa56233b5f2a081 (patch) | |
| tree | d18f292edb3f9baa30e6305bd2926174b2cbc341 /hw/pci-host | |
| parent | 62713b199859a72adcb2eeb7b795ae6981668529 (diff) | |
| parent | 0a1d5c4596b2fcd3accfe2556e7fade8787ce6b6 (diff) | |
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc.for-upstream-20180914' into staging
qemu-sparc.for-upstream queue
# gpg: Signature made Fri 14 Sep 2018 09:19:56 BST
# gpg: using RSA key 5BC2C56FAE0F321F
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>"
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* remotes/mcayland/tags/qemu-sparc.for-upstream-20180914:
sun4u: implement custom FWPathProvider
sabre: generate correct fw path for sabre PCI host bridge
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-host')
| -rw-r--r-- | hw/pci-host/sabre.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index e2f4ee480e..e33bd46967 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -496,6 +496,15 @@ static const TypeInfo sabre_pci_info = { }, }; +static char *sabre_ofw_unit_address(const SysBusDevice *dev) +{ + SabreState *s = SABRE_DEVICE(dev); + + return g_strdup_printf("%x,%x", + (uint32_t)((s->special_base >> 32) & 0xffffffff), + (uint32_t)(s->special_base & 0xffffffff)); +} + static Property sabre_properties[] = { DEFINE_PROP_UINT64("special-base", SabreState, special_base, 0), DEFINE_PROP_UINT64("mem-base", SabreState, mem_base, 0), @@ -505,11 +514,14 @@ static Property sabre_properties[] = { static void sabre_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass); dc->realize = sabre_realize; dc->reset = sabre_reset; dc->props = sabre_properties; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->fw_name = "pci"; + sbc->explicit_ofw_unit_address = sabre_ofw_unit_address; } static const TypeInfo sabre_info = { |