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authorMichael S. Tsirkin <mst@redhat.com>2013-08-27 08:37:26 +0300
committerMichael S. Tsirkin <mst@redhat.com>2013-08-27 10:13:41 +0300
commit1466cef32dd5e7ef3c6477e96d85d92302ad02e3 (patch)
treea5c37ae97d4ec34786244b388701b87cf251f174 /hw/pci-host
parent9eda7d373e9c691c070eddcbe3467b991f67f6bd (diff)
pc: fix regression for 64 bit PCI memory
commit 398489018183d613306ab022653552247d93919f pc: limit 64 bit hole to 2G by default introduced a way for management to control the window allocated to the 64 bit PCI hole. This is useful, but existing management tools do not know how to set this property. As a result, e.g. specifying a large ivshmem device with size > 4G is broken by default. For example this configuration no longer works: -device ivshmem,size=4294967296,chardev=cfoo -chardev socket,path=/tmp/sock,id=cfoo,server,nowait Fix this by detecting that hole size was not specified and defaulting to the backwards-compatible value of 1 << 62. Cc: qemu-stable@nongnu.org Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci-host')
-rw-r--r--hw/pci-host/piix.c9
-rw-r--r--hw/pci-host/q35.c8
2 files changed, 11 insertions, 6 deletions
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index dc1718fe30..221d82b637 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -320,6 +320,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
PCII440FXState *f;
unsigned i;
I440FXState *i440fx;
+ uint64_t pci_hole64_size;
dev = qdev_create(NULL, TYPE_I440FX_PCI_HOST_BRIDGE);
s = PCI_HOST_BRIDGE(dev);
@@ -351,13 +352,15 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
pci_hole_start, pci_hole_size);
memory_region_add_subregion(f->system_memory, pci_hole_start, &f->pci_hole);
+ pci_hole64_size = pci_host_get_hole64_size(i440fx->pci_hole64_size);
+
pc_init_pci64_hole(&i440fx->pci_info, 0x100000000ULL + above_4g_mem_size,
- i440fx->pci_hole64_size);
+ pci_hole64_size);
memory_region_init_alias(&f->pci_hole_64bit, OBJECT(d), "pci-hole64",
f->pci_address_space,
i440fx->pci_info.w64.begin,
- i440fx->pci_hole64_size);
- if (i440fx->pci_hole64_size) {
+ pci_hole64_size);
+ if (pci_hole64_size) {
memory_region_add_subregion(f->system_memory,
i440fx->pci_info.w64.begin,
&f->pci_hole_64bit);
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 12314d8dfe..4febd24f12 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -320,6 +320,7 @@ static int mch_init(PCIDevice *d)
{
int i;
MCHPCIState *mch = MCH_PCI_DEVICE(d);
+ uint64_t pci_hole64_size;
/* setup pci memory regions */
memory_region_init_alias(&mch->pci_hole, OBJECT(mch), "pci-hole",
@@ -329,13 +330,14 @@ static int mch_init(PCIDevice *d)
memory_region_add_subregion(mch->system_memory, mch->below_4g_mem_size,
&mch->pci_hole);
+ pci_hole64_size = pci_host_get_hole64_size(mch->pci_hole64_size);
pc_init_pci64_hole(&mch->pci_info, 0x100000000ULL + mch->above_4g_mem_size,
- mch->pci_hole64_size);
+ pci_hole64_size);
memory_region_init_alias(&mch->pci_hole_64bit, OBJECT(mch), "pci-hole64",
mch->pci_address_space,
mch->pci_info.w64.begin,
- mch->pci_hole64_size);
- if (mch->pci_hole64_size) {
+ pci_hole64_size);
+ if (pci_hole64_size) {
memory_region_add_subregion(mch->system_memory,
mch->pci_info.w64.begin,
&mch->pci_hole_64bit);