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authorEfimov Vasily <real@ispras.ru>2016-06-22 15:24:49 +0300
committerPaolo Bonzini <pbonzini@redhat.com>2016-06-29 14:03:46 +0200
commit401f2f3ef10037bdeda4549ed4cd5b06af3d1c6a (patch)
treed708f6995a4d562770bf50b9956f160078b9cad8 /hw/pci-host/q35.c
parent1a004c7fc8d9c9a4a4eb71b5717181f6fe5cf636 (diff)
Q35: implement property interfece to several parameters
During creation of Q35 instance several parameters are set using direct access. It violates Qemu device model. Correctly, the parameters should be handled as object properties. The patch adds four link type properties for fields: mch.ram_memory mch.pci_address_space mch.system_memory mch.address_space_io And, it adds two size type properties for fields: mch.below_4g_mem_size mch.above_4g_mem_size Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/pci-host/q35.c')
-rw-r--r--hw/pci-host/q35.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 70f897e3a9..03be05dc0d 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -127,6 +127,10 @@ static Property mch_props[] = {
DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, Q35PCIHost,
mch.pci_hole64_size, DEFAULT_PCI_HOLE64_SIZE),
DEFINE_PROP_UINT32("short_root_bus", Q35PCIHost, mch.short_root_bus, 0),
+ DEFINE_PROP_SIZE(PCI_HOST_BELOW_4G_MEM_SIZE, Q35PCIHost,
+ mch.below_4g_mem_size, 0),
+ DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MEM_SIZE, Q35PCIHost,
+ mch.above_4g_mem_size, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -177,6 +181,22 @@ static void q35_host_initfn(Object *obj)
q35_host_get_mmcfg_size,
NULL, NULL, NULL, NULL);
+ object_property_add_link(obj, MCH_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION,
+ (Object **) &s->mch.ram_memory,
+ qdev_prop_allow_set_link_before_realize, 0, NULL);
+
+ object_property_add_link(obj, MCH_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION,
+ (Object **) &s->mch.pci_address_space,
+ qdev_prop_allow_set_link_before_realize, 0, NULL);
+
+ object_property_add_link(obj, MCH_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION,
+ (Object **) &s->mch.system_memory,
+ qdev_prop_allow_set_link_before_realize, 0, NULL);
+
+ object_property_add_link(obj, MCH_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION,
+ (Object **) &s->mch.address_space_io,
+ qdev_prop_allow_set_link_before_realize, 0, NULL);
+
/* Leave enough space for the biggest MCFG BAR */
/* TODO: this matches current bios behaviour, but
* it's not a power of two, which means an MTRR