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authorPaul Burton <paul.burton@imgtec.com>2016-09-08 15:51:57 +0100
committerYongbok Kim <yongbok.kim@imgtec.com>2017-02-21 23:49:29 +0000
commit62be393423eac3d2fcb8313dc441db4e76f44c78 (patch)
treec35e06c51b10505a57bf7c809a5c9b39a4f368d1 /hw/pci-host/Makefile.objs
parent51b58561c1dacdb0ce999ada94912caaed157f83 (diff)
hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller
Add support for emulating the Xilinx AXI Root Port Bridge for PCI Express as described by Xilinx' PG055 document. This is a PCIe controller that can be used with certain series of Xilinx FPGAs, and is used on the MIPS Boston board which will make use of this code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [yongbok.kim@imgtec.com: removed returning on !level, updated IRQ connection with GPIO logic, moved xilinx_pcie_init() to boston.c replaced stw_le_p() with pci_set_word() and other cosmetic changes] Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Diffstat (limited to 'hw/pci-host/Makefile.objs')
-rw-r--r--hw/pci-host/Makefile.objs1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/pci-host/Makefile.objs b/hw/pci-host/Makefile.objs
index 45f1f0ebab..9c7909cf44 100644
--- a/hw/pci-host/Makefile.objs
+++ b/hw/pci-host/Makefile.objs
@@ -16,3 +16,4 @@ common-obj-$(CONFIG_FULONG) += bonito.o
common-obj-$(CONFIG_PCI_PIIX) += piix.o
common-obj-$(CONFIG_PCI_Q35) += q35.o
common-obj-$(CONFIG_PCI_GENERIC) += gpex.o
+common-obj-$(CONFIG_PCI_XILINX) += xilinx-pcie.o