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author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2013-12-03 21:56:50 -0800 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2013-12-10 13:28:50 +0000 |
commit | 06c2fe951d58cdf2cafb432a76415236c8f73328 (patch) | |
tree | dac7ba759871bb4cffe70d68241f677af3974ad4 /hw/pci-bridge | |
parent | 7cfd65e41c51cd8a55730524af750638cd416f95 (diff) |
net/cadence_gem: Prefetch rx descriptors ASAP
The real hardware prefetches rx buffer descriptors ASAP and
potentially throws relevant interrupts following the fetch
even in the absence of a received packet.
Reported-by: Deepika Dhamija <deepika@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 41629e35edfdb1f02f1e401f2c3d0e2e4c9e44b3.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-bridge')
0 files changed, 0 insertions, 0 deletions