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authorJonathan Cameron <jonathan.cameron@huawei.com>2022-01-18 17:48:55 +0000
committerMichael S. Tsirkin <mst@redhat.com>2022-03-06 05:08:23 -0500
commite609301b458bf6daba478299dc5aea5d1fbaea39 (patch)
tree08b5c5d7a8d27ab835cd3a3e1224f7174d22fcf3 /hw/pci-bridge
parentf59fb1889f480b0324a7ed0404a68ad5a0ad4f6c (diff)
hw/pci-bridge/pxb: Fix missing swizzle
pxb_map_irq_fn() handled the necessary removal of the swizzle applied to the PXB interrupts by the bus to which it was attached but neglected to apply the normal swizzle for PCI root ports on the expander bridge. Result of this was on ARM virt, the PME interrupts for a second RP on a PXB instance were miss-routed to #45 rather than #46. Tested with a selection of different configurations with 1 to 5 RP per PXB instance. Note on my x86 test setup the PME interrupts are not triggered so I haven't been able to test this. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Message-Id: <20220118174855.19325-1-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci-bridge')
-rw-r--r--hw/pci-bridge/pci_expander_bridge.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index 10e6e7c2ab..de932286b5 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -193,6 +193,12 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
PCIDevice *pxb = pci_get_bus(pci_dev)->parent_dev;
/*
+ * First carry out normal swizzle to handle
+ * multple root ports on a pxb instance.
+ */
+ pin = pci_swizzle_map_irq_fn(pci_dev, pin);
+
+ /*
* The bios does not index the pxb slot number when
* it computes the IRQ because it resides on bus 0
* and not on the current bus.