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| author | Max Filippov <jcmvbkbc@gmail.com> | 2017-12-22 13:53:36 -0800 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2018-01-11 09:31:26 -0800 |
| commit | e53fa62c17a87c8a6cdbe5fb265c876bb87bcff2 (patch) | |
| tree | 6e236f7d272a5912bc89ef79043e28912995b042 /hw/pci-bridge/xio3130_upstream.c | |
| parent | 29b39bc712b55ea535bf419821d797c5ba614146 (diff) | |
hw/xtensa: extract xtensa_create_memory_regions
XTFPGA boards should populate core memory regions the same way sim
machine does. Move xtensa_create_memory_regions implementation to a
separate file and use it to create instruction and data memory regions
on XTFPGA boards.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'hw/pci-bridge/xio3130_upstream.c')
0 files changed, 0 insertions, 0 deletions