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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-05-27 17:09:52 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-05-27 17:09:52 +0100
commit73fb3b764b076132fb269475c128a7e9dcb22ed6 (patch)
tree6ddd6cad3d6391d553d171cf8cb28e77618b8d09 /hw/pci-bridge/xio3130_downstream.h
parent68fdb6c5b0b93d6780255d4f82940d7b342079bd (diff)
target-arm: A64: Add SP entries for EL2 and 3
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1400980132-25949-10-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-bridge/xio3130_downstream.h')
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