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authorAnthony Liguori <aliguori@us.ibm.com>2013-01-11 08:43:18 -0600
committerAnthony Liguori <aliguori@us.ibm.com>2013-01-11 08:43:18 -0600
commitfedf2de31023b4ee71a4e578db013976243a8143 (patch)
tree045c7ea2a636428ee70545ef3f76a804989be050 /hw/pc.c
parente2848a78b0a6715f94623bdf43ef74d3d08cfe4d (diff)
parentc02e1eac887b1b0aee7361b1fcf889e7d47fed9d (diff)
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
* stefanha/trivial-patches: hw/pc.c: Fix converting of ioport_register* to MemoryRegion Replace remaining gmtime, localtime by gmtime_r, localtime_r savevm: Remove MinGW specific code which is no longer needed qga/channel-posix.c: Explicitly include string.h configure: Fix comment (copy+paste bug) readline: avoid memcpy() of overlapping regions Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/pc.c')
-rw-r--r--hw/pc.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/hw/pc.c b/hw/pc.c
index 68984e4161..dfa3144aea 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -103,6 +103,11 @@ static void ioport80_write(void *opaque, hwaddr addr, uint64_t data,
{
}
+static uint64_t ioport80_read(void *opaque, hwaddr addr, unsigned size)
+{
+ return 0xffffffffffffffff;
+}
+
/* MSDOS compatibility mode FPU exception support */
static qemu_irq ferr_irq;
@@ -123,6 +128,11 @@ static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data,
qemu_irq_lower(ferr_irq);
}
+static uint64_t ioportF0_read(void *opaque, hwaddr addr, unsigned size)
+{
+ return 0xffffffffffffffff;
+}
+
/* TSC handling */
uint64_t cpu_get_tsc(CPUX86State *env)
{
@@ -960,6 +970,7 @@ static void cpu_request_exit(void *opaque, int irq, int level)
static const MemoryRegionOps ioport80_io_ops = {
.write = ioport80_write,
+ .read = ioport80_read,
.endianness = DEVICE_NATIVE_ENDIAN,
.impl = {
.min_access_size = 1,
@@ -969,6 +980,7 @@ static const MemoryRegionOps ioport80_io_ops = {
static const MemoryRegionOps ioportF0_io_ops = {
.write = ioportF0_write,
+ .read = ioportF0_read,
.endianness = DEVICE_NATIVE_ENDIAN,
.impl = {
.min_access_size = 1,