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authorStafford Horne <shorne@gmail.com>2022-02-10 06:39:12 +0900
committerStafford Horne <shorne@gmail.com>2022-02-26 10:39:36 +0900
commit5852c1f86529ca6f4055a69d1683f91384fceaed (patch)
treee2523b6041e798e5bf56666c50d6f5f928d3f462 /hw/openrisc/meson.build
parentf42e09e6a6b3dd996419fe0e6c1bbc68898f3a6e (diff)
hw/openrisc/openrisc_sim: Add automatic device tree generation
Using the device tree means that qemu can now directly tell the kernel what hardware is configured rather than use having to maintain and update a separate device tree file. This patch adds automatic device tree generation support for the OpenRISC simulator. A device tree is built up based on the state of the configure openrisc simulator. This is then dumped to memory and the load address is passed to the kernel in register r3. Signed-off-by: Stafford Horne <shorne@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/openrisc/meson.build')
-rw-r--r--hw/openrisc/meson.build2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/openrisc/meson.build b/hw/openrisc/meson.build
index 947f63ee08..ec48172c9d 100644
--- a/hw/openrisc/meson.build
+++ b/hw/openrisc/meson.build
@@ -1,5 +1,5 @@
openrisc_ss = ss.source_set()
openrisc_ss.add(files('cputimer.c'))
-openrisc_ss.add(when: 'CONFIG_OR1K_SIM', if_true: files('openrisc_sim.c'))
+openrisc_ss.add(when: 'CONFIG_OR1K_SIM', if_true: [files('openrisc_sim.c'), fdt])
hw_arch += {'openrisc': openrisc_ss}