diff options
| author | Jan Kiszka <jan.kiszka@siemens.com> | 2009-05-02 00:29:37 +0200 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-05-22 10:50:34 -0500 |
| commit | 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (patch) | |
| tree | fff3d6f590833c0f894a6c7c300ab126b5259d95 /hw/openpic.c | |
| parent | 93102fd6010c68320bc9a008c8cf70cb4a36d4b9 (diff) | |
Introduce reset notifier order
Add the parameter 'order' to qemu_register_reset and sort callbacks on
registration. On system reset, callbacks with lower order will be
invoked before those with higher order. Update all existing users to the
standard order 0.
Note: At least for x86, the existing users seem to assume that handlers
are called in their registration order. Therefore, the patch preserves
this property. If someone feels bored, (s)he could try to identify this
dependency and express it properly on callback registration.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/openpic.c')
| -rw-r--r-- | hw/openpic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/openpic.c b/hw/openpic.c index 561c609e3f..51c8ad827e 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -1249,7 +1249,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, opp->need_swap = 1; register_savevm("openpic", 0, 2, openpic_save, openpic_load, opp); - qemu_register_reset(openpic_reset, opp); + qemu_register_reset(openpic_reset, 0, opp); opp->irq_raise = openpic_irq_raise; opp->reset = openpic_reset; @@ -1709,7 +1709,7 @@ qemu_irq *mpic_init (target_phys_addr_t base, int nb_cpus, mpp->reset = mpic_reset; register_savevm("mpic", 0, 2, openpic_save, openpic_load, mpp); - qemu_register_reset(mpic_reset, mpp); + qemu_register_reset(mpic_reset, 0, mpp); mpp->reset(mpp); return qemu_allocate_irqs(openpic_set_irq, mpp, mpp->max_irq); |