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authorAvi Kivity <avi@redhat.com>2011-11-24 14:32:34 +0200
committerAvi Kivity <avi@redhat.com>2011-11-28 15:38:41 +0200
commit6a0148e7b57515d94d158e84175da3a29de1f850 (patch)
tree408d99ca84e2f648dc20822588221f6b9eae52b8 /hw/omap_sdrc.c
parent9832b74c149b2859c3a4e142ba719a0acc4e2733 (diff)
omap_sdrc: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'hw/omap_sdrc.c')
-rw-r--r--hw/omap_sdrc.c39
1 files changed, 21 insertions, 18 deletions
diff --git a/hw/omap_sdrc.c b/hw/omap_sdrc.c
index 1df2fd82bd..784e326105 100644
--- a/hw/omap_sdrc.c
+++ b/hw/omap_sdrc.c
@@ -22,6 +22,7 @@
/* SDRAM Controller Subsystem */
struct omap_sdrc_s {
+ MemoryRegion iomem;
uint8_t config;
};
@@ -30,10 +31,15 @@ void omap_sdrc_reset(struct omap_sdrc_s *s)
s->config = 0x10;
}
-static uint32_t omap_sdrc_read(void *opaque, target_phys_addr_t addr)
+static uint64_t omap_sdrc_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
struct omap_sdrc_s *s = (struct omap_sdrc_s *) opaque;
+ if (size != 4) {
+ return omap_badwidth_read32(opaque, addr);
+ }
+
switch (addr) {
case 0x00: /* SDRC_REVISION */
return 0x20;
@@ -81,10 +87,14 @@ static uint32_t omap_sdrc_read(void *opaque, target_phys_addr_t addr)
}
static void omap_sdrc_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value, unsigned size)
{
struct omap_sdrc_s *s = (struct omap_sdrc_s *) opaque;
+ if (size != 4) {
+ return omap_badwidth_write32(opaque, addr, value);
+ }
+
switch (addr) {
case 0x00: /* SDRC_REVISION */
case 0x14: /* SDRC_SYSSTATUS */
@@ -97,7 +107,7 @@ static void omap_sdrc_write(void *opaque, target_phys_addr_t addr,
case 0x10: /* SDRC_SYSCONFIG */
if ((value >> 3) != 0x2)
fprintf(stderr, "%s: bad SDRAM idle mode %i\n",
- __FUNCTION__, value >> 3);
+ __FUNCTION__, (unsigned)value >> 3);
if (value & 2)
omap_sdrc_reset(s);
s->config = value & 0x18;
@@ -137,29 +147,22 @@ static void omap_sdrc_write(void *opaque, target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const omap_sdrc_readfn[] = {
- omap_badwidth_read32,
- omap_badwidth_read32,
- omap_sdrc_read,
-};
-
-static CPUWriteMemoryFunc * const omap_sdrc_writefn[] = {
- omap_badwidth_write32,
- omap_badwidth_write32,
- omap_sdrc_write,
+static const MemoryRegionOps omap_sdrc_ops = {
+ .read = omap_sdrc_read,
+ .write = omap_sdrc_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
-struct omap_sdrc_s *omap_sdrc_init(target_phys_addr_t base)
+struct omap_sdrc_s *omap_sdrc_init(MemoryRegion *sysmem,
+ target_phys_addr_t base)
{
- int iomemtype;
struct omap_sdrc_s *s = (struct omap_sdrc_s *)
g_malloc0(sizeof(struct omap_sdrc_s));
omap_sdrc_reset(s);
- iomemtype = cpu_register_io_memory(omap_sdrc_readfn,
- omap_sdrc_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, 0x1000, iomemtype);
+ memory_region_init_io(&s->iomem, &omap_sdrc_ops, s, "omap.sdrc", 0x1000);
+ memory_region_add_subregion(sysmem, base, &s->iomem);
return s;
}