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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-21 20:40:22 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-21 20:40:22 +0000
commitafbb5194d430adc0f1f3a63ea627bc93e8d17c56 (patch)
tree4e89b563a2287d396af41db81d2ea77ceea7337c /hw/omap2.c
parent51fec3cc7eb7a9c8e1be2f2bb971db303d17ea61 (diff)
Handle on-chip DMA controllers in one place, convert OMAP DMA to use it.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4920 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/omap2.c')
-rw-r--r--hw/omap2.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/omap2.c b/hw/omap2.c
index 8c9ac6a81e..fa7b35c07f 100644
--- a/hw/omap2.c
+++ b/hw/omap2.c
@@ -26,6 +26,7 @@
#include "qemu-timer.h"
#include "qemu-char.h"
#include "flash.h"
+#include "soc_dma.h"
#include "audio/audio.h"
/* GP timers */
@@ -4493,6 +4494,10 @@ struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
omap_findclk(s, "sdma_fclk"));
s->port->addr_valid = omap2_validate_addr;
+ /* Register SDRAM and SRAM ports for fast DMA transfers. */
+ soc_dma_port_add_mem_ram(s->dma, q2_base, OMAP2_Q2_BASE, s->sdram_size);
+ soc_dma_port_add_mem_ram(s->dma, sram_base, OMAP2_SRAM_BASE, s->sram_size);
+
s->uart[0] = omap2_uart_init(omap_l4ta(s->l4, 19),
s->irq[0][OMAP_INT_24XX_UART1_IRQ],
omap_findclk(s, "uart1_fclk"),