diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2011-09-23 09:44:38 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2011-09-23 09:44:38 +0000 |
commit | 0919ac787641db11024912651f3bc5764d4f1286 (patch) | |
tree | fa2c3c45aa6e2dab88e724c50a042482ffdba461 /hw/omap1.c | |
parent | 53bb614ee344c2eb37cf5a79d56c945d7661fcf5 (diff) |
omap_intc: Qdevify
Convert the omap_intc devices to qdev. This includes adding
a 'revision' property which will be needed for omap3.
The bulk of this patch is the replacement of "s->irq[x][y]"
with "qdev_get_gpio_in(s->ih[x], y)" now that the interrupt
controller exposes its input lines as qdev gpio inputs.
The devices are named "omap-intc" and "omap2-intc", following
the filename and the OMAP2/3 hardware names, although some
internal functions are still named "omap_inth_*".
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/omap1.c')
-rw-r--r-- | hw/omap1.c | 141 |
1 files changed, 86 insertions, 55 deletions
diff --git a/hw/omap1.c b/hw/omap1.c index f747321e97..4bf88e8b7f 100644 --- a/hw/omap1.c +++ b/hw/omap1.c @@ -524,7 +524,7 @@ static uint64_t omap_ulpd_pm_read(void *opaque, target_phys_addr_t addr, case 0x14: /* IT_STATUS */ ret = s->ulpd_pm_regs[addr >> 2]; s->ulpd_pm_regs[addr >> 2] = 0; - qemu_irq_lower(s->irq[1][OMAP_INT_GAUGE_32K]); + qemu_irq_lower(qdev_get_gpio_in(s->ih[1], OMAP_INT_GAUGE_32K)); return ret; case 0x18: /* Reserved */ @@ -625,7 +625,7 @@ static void omap_ulpd_pm_write(void *opaque, target_phys_addr_t addr, s->ulpd_pm_regs[0x14 >> 2] |= 1 << 1; s->ulpd_pm_regs[0x14 >> 2] |= 1 << 0; /* IT_GAUGING */ - qemu_irq_raise(s->irq[1][OMAP_INT_GAUGE_32K]); + qemu_irq_raise(qdev_get_gpio_in(s->ih[1], OMAP_INT_GAUGE_32K)); } } s->ulpd_pm_regs[addr >> 2] = value; @@ -2257,15 +2257,17 @@ static void omap_uwire_reset(struct omap_uwire_s *s) s->setup[4] = 0; } -struct omap_uwire_s *omap_uwire_init(MemoryRegion *system_memory, - target_phys_addr_t base, - qemu_irq *irq, qemu_irq dma, omap_clk clk) +static struct omap_uwire_s *omap_uwire_init(MemoryRegion *system_memory, + target_phys_addr_t base, + qemu_irq txirq, qemu_irq rxirq, + qemu_irq dma, + omap_clk clk) { struct omap_uwire_s *s = (struct omap_uwire_s *) g_malloc0(sizeof(struct omap_uwire_s)); - s->txirq = irq[0]; - s->rxirq = irq[1]; + s->txirq = txirq; + s->rxirq = rxirq; s->txdrq = dma; omap_uwire_reset(s); @@ -2873,14 +2875,15 @@ static void omap_rtc_reset(struct omap_rtc_s *s) } static struct omap_rtc_s *omap_rtc_init(MemoryRegion *system_memory, - target_phys_addr_t base, - qemu_irq *irq, omap_clk clk) + target_phys_addr_t base, + qemu_irq timerirq, qemu_irq alarmirq, + omap_clk clk) { struct omap_rtc_s *s = (struct omap_rtc_s *) g_malloc0(sizeof(struct omap_rtc_s)); - s->irq = irq[0]; - s->alarm = irq[1]; + s->irq = timerirq; + s->alarm = alarmirq; s->clk = qemu_new_timer_ms(rt_clock, omap_rtc_tick, s); omap_rtc_reset(s); @@ -3402,15 +3405,16 @@ static void omap_mcbsp_reset(struct omap_mcbsp_s *s) qemu_del_timer(s->sink_timer); } -struct omap_mcbsp_s *omap_mcbsp_init(MemoryRegion *system_memory, - target_phys_addr_t base, - qemu_irq *irq, qemu_irq *dma, omap_clk clk) +static struct omap_mcbsp_s *omap_mcbsp_init(MemoryRegion *system_memory, + target_phys_addr_t base, + qemu_irq txirq, qemu_irq rxirq, + qemu_irq *dma, omap_clk clk) { struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) g_malloc0(sizeof(struct omap_mcbsp_s)); - s->txirq = irq[0]; - s->rxirq = irq[1]; + s->txirq = txirq; + s->rxirq = rxirq; s->txdrq = dma[0]; s->rxdrq = dma[1]; s->sink_timer = qemu_new_timer_ns(vm_clock, omap_mcbsp_sink_tick, s); @@ -3642,8 +3646,6 @@ static void omap1_mpu_reset(void *opaque) { struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque; - omap_inth_reset(mpu->ih[0]); - omap_inth_reset(mpu->ih[1]); omap_dma_reset(mpu->dma); omap_mpu_timer_reset(mpu->timer[0]); omap_mpu_timer_reset(mpu->timer[1]); @@ -3796,6 +3798,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory, qemu_irq *cpu_irq; qemu_irq dma_irqs[6]; DriveInfo *dinfo; + SysBusDevice *busdev; if (!core) core = "ti925t"; @@ -3824,17 +3827,30 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory, omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s); cpu_irq = arm_pic_init_cpu(s->env); - s->ih[0] = omap_inth_init(0xfffecb00, 0x100, 1, &s->irq[0], - cpu_irq[ARM_PIC_CPU_IRQ], cpu_irq[ARM_PIC_CPU_FIQ], - omap_findclk(s, "arminth_ck")); - s->ih[1] = omap_inth_init(0xfffe0000, 0x800, 1, &s->irq[1], - omap_inth_get_pin(s->ih[0], OMAP_INT_15XX_IH2_IRQ), - NULL, omap_findclk(s, "arminth_ck")); - - for (i = 0; i < 6; i ++) - dma_irqs[i] = - s->irq[omap1_dma_irq_map[i].ih][omap1_dma_irq_map[i].intr]; - s->dma = omap_dma_init(0xfffed800, dma_irqs, s->irq[0][OMAP_INT_DMA_LCD], + s->ih[0] = qdev_create(NULL, "omap-intc"); + qdev_prop_set_uint32(s->ih[0], "size", 0x100); + qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck")); + qdev_init_nofail(s->ih[0]); + busdev = sysbus_from_qdev(s->ih[0]); + sysbus_connect_irq(busdev, 0, cpu_irq[ARM_PIC_CPU_IRQ]); + sysbus_connect_irq(busdev, 1, cpu_irq[ARM_PIC_CPU_FIQ]); + sysbus_mmio_map(busdev, 0, 0xfffecb00); + s->ih[1] = qdev_create(NULL, "omap-intc"); + qdev_prop_set_uint32(s->ih[1], "size", 0x800); + qdev_prop_set_ptr(s->ih[1], "clk", omap_findclk(s, "arminth_ck")); + qdev_init_nofail(s->ih[1]); + busdev = sysbus_from_qdev(s->ih[1]); + sysbus_connect_irq(busdev, 0, + qdev_get_gpio_in(s->ih[0], OMAP_INT_15XX_IH2_IRQ)); + /* The second interrupt controller's FIQ output is not wired up */ + sysbus_mmio_map(busdev, 0, 0xfffe0000); + + for (i = 0; i < 6; i++) { + dma_irqs[i] = qdev_get_gpio_in(s->ih[omap1_dma_irq_map[i].ih], + omap1_dma_irq_map[i].intr); + } + s->dma = omap_dma_init(0xfffed800, dma_irqs, + qdev_get_gpio_in(s->ih[0], OMAP_INT_DMA_LCD), s, omap_findclk(s, "dma_ck"), omap_dma_3_1); s->port[emiff ].addr_valid = omap_validate_emiff_addr; @@ -3851,25 +3867,27 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory, OMAP_IMIF_BASE, s->sram_size); s->timer[0] = omap_mpu_timer_init(system_memory, 0xfffec500, - s->irq[0][OMAP_INT_TIMER1], + qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER1), omap_findclk(s, "mputim_ck")); s->timer[1] = omap_mpu_timer_init(system_memory, 0xfffec600, - s->irq[0][OMAP_INT_TIMER2], + qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER2), omap_findclk(s, "mputim_ck")); s->timer[2] = omap_mpu_timer_init(system_memory, 0xfffec700, - s->irq[0][OMAP_INT_TIMER3], + qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER3), omap_findclk(s, "mputim_ck")); s->wdt = omap_wd_timer_init(system_memory, 0xfffec800, - s->irq[0][OMAP_INT_WD_TIMER], + qdev_get_gpio_in(s->ih[0], OMAP_INT_WD_TIMER), omap_findclk(s, "armwdt_ck")); s->os_timer = omap_os_timer_init(system_memory, 0xfffb9000, - s->irq[1][OMAP_INT_OS_TIMER], + qdev_get_gpio_in(s->ih[1], OMAP_INT_OS_TIMER), omap_findclk(s, "clk32-kHz")); - s->lcd = omap_lcdc_init(0xfffec000, s->irq[0][OMAP_INT_LCD_CTRL], - omap_dma_get_lcdch(s->dma), omap_findclk(s, "lcd_ck")); + s->lcd = omap_lcdc_init(0xfffec000, + qdev_get_gpio_in(s->ih[0], OMAP_INT_LCD_CTRL), + omap_dma_get_lcdch(s->dma), + omap_findclk(s, "lcd_ck")); omap_ulpd_pm_init(system_memory, 0xfffe0800, s); omap_pin_cfg_init(system_memory, 0xfffe1000, s); @@ -3878,27 +3896,30 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory, omap_mpui_init(system_memory, 0xfffec900, s); s->private_tipb = omap_tipb_bridge_init(system_memory, 0xfffeca00, - s->irq[0][OMAP_INT_BRIDGE_PRIV], + qdev_get_gpio_in(s->ih[0], OMAP_INT_BRIDGE_PRIV), omap_findclk(s, "tipb_ck")); s->public_tipb = omap_tipb_bridge_init(system_memory, 0xfffed300, - s->irq[0][OMAP_INT_BRIDGE_PUB], + qdev_get_gpio_in(s->ih[0], OMAP_INT_BRIDGE_PUB), omap_findclk(s, "tipb_ck")); omap_tcmi_init(system_memory, 0xfffecc00, s); - s->uart[0] = omap_uart_init(0xfffb0000, s->irq[1][OMAP_INT_UART1], + s->uart[0] = omap_uart_init(0xfffb0000, + qdev_get_gpio_in(s->ih[1], OMAP_INT_UART1), omap_findclk(s, "uart1_ck"), omap_findclk(s, "uart1_ck"), s->drq[OMAP_DMA_UART1_TX], s->drq[OMAP_DMA_UART1_RX], "uart1", serial_hds[0]); - s->uart[1] = omap_uart_init(0xfffb0800, s->irq[1][OMAP_INT_UART2], + s->uart[1] = omap_uart_init(0xfffb0800, + qdev_get_gpio_in(s->ih[1], OMAP_INT_UART2), omap_findclk(s, "uart2_ck"), omap_findclk(s, "uart2_ck"), s->drq[OMAP_DMA_UART2_TX], s->drq[OMAP_DMA_UART2_RX], "uart2", serial_hds[0] ? serial_hds[1] : NULL); - s->uart[2] = omap_uart_init(0xfffb9800, s->irq[0][OMAP_INT_UART3], + s->uart[2] = omap_uart_init(0xfffb9800, + qdev_get_gpio_in(s->ih[0], OMAP_INT_UART3), omap_findclk(s, "uart3_ck"), omap_findclk(s, "uart3_ck"), s->drq[OMAP_DMA_UART3_TX], s->drq[OMAP_DMA_UART3_RX], @@ -3918,42 +3939,52 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory, exit(1); } s->mmc = omap_mmc_init(0xfffb7800, dinfo->bdrv, - s->irq[1][OMAP_INT_OQN], &s->drq[OMAP_DMA_MMC_TX], + qdev_get_gpio_in(s->ih[1], OMAP_INT_OQN), + &s->drq[OMAP_DMA_MMC_TX], omap_findclk(s, "mmc_ck")); s->mpuio = omap_mpuio_init(system_memory, 0xfffb5000, - s->irq[1][OMAP_INT_KEYBOARD], s->irq[1][OMAP_INT_MPUIO], - s->wakeup, omap_findclk(s, "clk32-kHz")); + qdev_get_gpio_in(s->ih[1], OMAP_INT_KEYBOARD), + qdev_get_gpio_in(s->ih[1], OMAP_INT_MPUIO), + s->wakeup, omap_findclk(s, "clk32-kHz")); s->gpio = qdev_create(NULL, "omap-gpio"); qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); qdev_init_nofail(s->gpio); sysbus_connect_irq(sysbus_from_qdev(s->gpio), 0, - s->irq[0][OMAP_INT_GPIO_BANK1]); + qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1)); sysbus_mmio_map(sysbus_from_qdev(s->gpio), 0, 0xfffce000); - s->microwire = omap_uwire_init(system_memory, - 0xfffb3000, &s->irq[1][OMAP_INT_uWireTX], + s->microwire = omap_uwire_init(system_memory, 0xfffb3000, + qdev_get_gpio_in(s->ih[1], OMAP_INT_uWireTX), + qdev_get_gpio_in(s->ih[1], OMAP_INT_uWireRX), s->drq[OMAP_DMA_UWIRE_TX], omap_findclk(s, "mpuper_ck")); omap_pwl_init(system_memory, 0xfffb5800, s, omap_findclk(s, "armxor_ck")); omap_pwt_init(system_memory, 0xfffb6000, s, omap_findclk(s, "armxor_ck")); - s->i2c[0] = omap_i2c_init(0xfffb3800, s->irq[1][OMAP_INT_I2C], + s->i2c[0] = omap_i2c_init(0xfffb3800, + qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C), &s->drq[OMAP_DMA_I2C_RX], omap_findclk(s, "mpuper_ck")); s->rtc = omap_rtc_init(system_memory, 0xfffb4800, - &s->irq[1][OMAP_INT_RTC_TIMER], + qdev_get_gpio_in(s->ih[1], OMAP_INT_RTC_TIMER), + qdev_get_gpio_in(s->ih[1], OMAP_INT_RTC_ALARM), omap_findclk(s, "clk32-kHz")); - s->mcbsp1 = omap_mcbsp_init(system_memory, - 0xfffb1800, &s->irq[1][OMAP_INT_McBSP1TX], + s->mcbsp1 = omap_mcbsp_init(system_memory, 0xfffb1800, + qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP1TX), + qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP1RX), &s->drq[OMAP_DMA_MCBSP1_TX], omap_findclk(s, "dspxor_ck")); - s->mcbsp2 = omap_mcbsp_init(system_memory, - 0xfffb1000, &s->irq[0][OMAP_INT_310_McBSP2_TX], + s->mcbsp2 = omap_mcbsp_init(system_memory, 0xfffb1000, + qdev_get_gpio_in(s->ih[0], + OMAP_INT_310_McBSP2_TX), + qdev_get_gpio_in(s->ih[0], + OMAP_INT_310_McBSP2_RX), &s->drq[OMAP_DMA_MCBSP2_TX], omap_findclk(s, "mpuper_ck")); - s->mcbsp3 = omap_mcbsp_init(system_memory, - 0xfffb7000, &s->irq[1][OMAP_INT_McBSP3TX], + s->mcbsp3 = omap_mcbsp_init(system_memory, 0xfffb7000, + qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP3TX), + qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP3RX), &s->drq[OMAP_DMA_MCBSP3_TX], omap_findclk(s, "dspxor_ck")); s->led[0] = omap_lpg_init(system_memory, |