diff options
author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-03 12:50:46 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-03 12:50:46 +0000 |
commit | 026459262747819f90a4056292582661294342ce (patch) | |
tree | 891aabb40700fadc0ee13f267bfd75c09559c772 /hw/omap.h | |
parent | 5c1c390feac308327eee376845d90355b16615b9 (diff) |
Split I^2C controller out of hw/omap.c.
Insert a list of missing memory mappings from OMAP310 datasheet.
Add missing "rtc" field for RTC.
Correct PWL and PWT register read/write handler pointers.
Add a Changelog entry about OMAP emulation.
Add a qemu-doc snippet about Palm T|E platform.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3516 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/omap.h')
-rw-r--r-- | hw/omap.h | 14 |
1 files changed, 9 insertions, 5 deletions
@@ -475,11 +475,6 @@ struct omap_uwire_s *omap_uwire_init(target_phys_addr_t base, void omap_uwire_attach(struct omap_uwire_s *s, struct uwire_slave_s *slave, int chipselect); -struct omap_i2c_s; -struct omap_i2c_s *omap_i2c_init(target_phys_addr_t base, - qemu_irq irq, qemu_irq *dma, omap_clk clk); -i2c_bus *omap_i2c_bus(struct omap_i2c_s *s); - struct omap_rtc_s; struct omap_rtc_s *omap_rtc_init(target_phys_addr_t base, qemu_irq *irq, omap_clk clk); @@ -498,6 +493,13 @@ struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base, void omap_mmc_reset(struct omap_mmc_s *s); void omap_mmc_handlers(struct omap_mmc_s *s, qemu_irq ro, qemu_irq cover); +/* omap_i2c.c */ +struct omap_i2c_s; +struct omap_i2c_s *omap_i2c_init(target_phys_addr_t base, + qemu_irq irq, qemu_irq *dma, omap_clk clk); +void omap_i2c_reset(struct omap_i2c_s *s); +i2c_bus *omap_i2c_bus(struct omap_i2c_s *s); + # define cpu_is_omap310(cpu) (cpu->mpu_model == omap310) # define cpu_is_omap1510(cpu) (cpu->mpu_model == omap1510) # define cpu_is_omap15xx(cpu) \ @@ -561,6 +563,8 @@ struct omap_mpu_state_s { struct omap_i2c_s *i2c; + struct omap_rtc_s *rtc; + /* MPU private TIPB peripherals */ struct omap_intr_handler_s *ih[2]; |