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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-12-05 03:23:39 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-12-05 03:23:39 +0000
commit106627d0a036f9ebe523c648686b087eb8888355 (patch)
tree42d19914a690e0bd84f4b41843d556697e7582d1 /hw/omap.h
parent577390ff4b7ca39f3780cbfd67d02bff3d4bf8e5 (diff)
Rework OMAP1 interrupt handling to allow multiple interrupt banks, by Lauro Ramos Venancio.
Add irq pulse shortcut, by Lauro Ramos Venancio. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3774 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/omap.h')
-rw-r--r--hw/omap.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/omap.h b/hw/omap.h
index 7d189d606e..cd4e53bc98 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -57,7 +57,8 @@ void omap_clk_reparent(omap_clk clk, omap_clk parent);
/* omap.c */
struct omap_intr_handler_s;
struct omap_intr_handler_s *omap_inth_init(target_phys_addr_t base,
- unsigned long size, qemu_irq parent[2], omap_clk clk);
+ unsigned long size, unsigned char nbanks,
+ qemu_irq parent_irq, qemu_irq parent_fiq, omap_clk clk);
/*
* Common IRQ numbers for level 1 interrupt handler