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authorPeter Maydell <peter.maydell@linaro.org>2016-01-18 09:33:36 +0000
committerPeter Maydell <peter.maydell@linaro.org>2016-01-18 09:33:36 +0000
commit4aaddc2976bff1918edcd53900b647dde473dd4d (patch)
treedaa5c44427519001111a4579505610f7c2198598 /hw/nvram
parent19b6d84316892c8086e0115d6f09cb01abb86cfc (diff)
parent6d5322442a6904fef51a409ec40f2945581220d6 (diff)
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into staging
qemu-sparc update # gpg: Signature made Sat 16 Jan 2016 12:32:06 GMT using RSA key ID AE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" * remotes/mcayland/tags/qemu-sparc-signed: target-sparc: Migrate CWP and PIL for SPARC64 target-sparc: Use VMState arrays for SPARC64 TLB/MMU state target-sparc: Convert to VMStateDescription target-sparc: Don't flush TLB in cpu_load function target-sparc: Split cpu_put_psr into side-effect and no-side-effect parts vmstate: define vmstate_info_uinttl vmstate: Introduce VMSTATE_VARRAY_MULTPLY vmstate: introduce CPU_DoubleU arrays Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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