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| author | Peter Maydell <peter.maydell@linaro.org> | 2022-04-04 15:48:55 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-04-04 15:48:55 +0100 |
| commit | 20661b75ea6093f5e59079d00a778a972d6732c5 (patch) | |
| tree | d1b7b85ec58e7b624a28f23303afd1c129907fa9 /hw/nvram/xlnx-bbram.c | |
| parent | bc6ec396d471d9e4aae7e2ff8b72e11da9a97665 (diff) | |
| parent | 0798da8df9fd917515c957ae918d6d979cf5f3fb (diff) | |
Merge tag 'pull-ppc-20220404' of https://github.com/legoater/qemu into staging
ppc-7.0 queue:
* Coverity fixes
* Fix for a memory leak issue
# gpg: Signature made Mon 04 Apr 2022 09:45:51 BST
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* tag 'pull-ppc-20220404' of https://github.com/legoater/qemu:
linux-user/ppc: Narrow type of ccr in save_user_regs
ppc/pnv: Fix number of registers in the PCIe controller on POWER9
hw/ppc: free env->tb_env in spapr_unrealize_vcpu()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/nvram/xlnx-bbram.c')
0 files changed, 0 insertions, 0 deletions