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authorAnup Patel <apatel@ventanamicro.com>2022-11-08 18:26:59 +0530
committerAlistair Francis <alistair.francis@wdc.com>2023-01-06 10:42:55 +1000
commit6535a443345d659882444f0db1fafd22ba1f803a (patch)
tree97974901476d3fb8db6ed0171f3066e978019071 /hw/nubus
parent0a9a6cba8b9cad8786670fd8c9fa1b0d39bd00e8 (diff)
target/riscv: Typo fix in sstc() predicate
We should use "&&" instead of "&" when checking hcounteren.TM and henvcfg.STCE bits. Fixes: 3ec0fe18a31f ("target/riscv: Add vstimecmp suppor") Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221108125703.1463577-2-apatel@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/nubus')
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