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authorJean-Christophe Dubois <jcd@tribudubois.net>2016-05-30 19:25:53 +0200
committerJason Wang <jasowang@redhat.com>2016-06-02 10:42:46 +0800
commitb413643a5cdac809a1374481c990387b732f9e60 (patch)
tree40f118a71ac4d1736883e71a3a89aa3c68e29e63 /hw/net
parent4816dc168b5745708eba4c005f5e8771623ee405 (diff)
i.MX: Fix FEC code for MDIO address selection
According to the FEC chapter of i.MX25 reference manual When writing to MMFR register, the MDIO device and adress are selected by bit 27 to 23 and bit 22 to 18 respectively. This is a total of 10 bits that need to be used by the Phy chip/address decoding function. This patch fixes the number of bits used from 9 to 10. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'hw/net')
-rw-r--r--hw/net/imx_fec.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index fce366145e..bf68ce66cf 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -460,9 +460,9 @@ static void imx_fec_write(void *opaque, hwaddr addr,
/* store the value */
s->mmfr = value;
if (extract32(value, 29, 1)) {
- s->mmfr = do_phy_read(s, extract32(value, 18, 9));
+ s->mmfr = do_phy_read(s, extract32(value, 18, 10));
} else {
- do_phy_write(s, extract32(value, 18, 9), extract32(value, 0, 16));
+ do_phy_write(s, extract32(value, 18, 10), extract32(value, 0, 16));
}
/* raise the interrupt as the PHY operation is done */
s->eir |= FEC_INT_MII;