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authorMichael Davidsaver <mdavidsaver@gmail.com>2017-01-27 15:20:25 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-01-27 15:29:08 +0000
commitd05a86285cacdcbfdd97e437d156545666fa5641 (patch)
treeb7ef7ad203c485fe54acc73ab98b86497ff5c9e7 /hw/net
parent056f43df9168413f304500b69c33158d66efb7cf (diff)
arm: stellaris: make MII accesses complete immediately
When the guest attempts to start an MII register access via the MCTL register, clear the START bit, so that when the guest reads it back the register transaction will be signalled as having completed. This avoids the guest spinning as it polls the START bit waiting for it to clear (which it previously never would). The MII registers themselves still aren't implemented, but at least we can avoid guests spending quite so much time busy waiting. Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1484938222-1423-1-git-send-email-peter.maydell@linaro.org [PMM: expand commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/net')
-rw-r--r--hw/net/stellaris_enet.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c
index 957730e023..04bd10ada3 100644
--- a/hw/net/stellaris_enet.c
+++ b/hw/net/stellaris_enet.c
@@ -416,7 +416,10 @@ static void stellaris_enet_write(void *opaque, hwaddr offset,
s->thr = value;
break;
case 0x20: /* MCTL */
- s->mctl = value;
+ /* TODO: MII registers aren't modelled.
+ * Clear START, indicating that the operation completes immediately.
+ */
+ s->mctl = value & ~1;
break;
case 0x24: /* MDV */
s->mdv = value;