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authorSai Pavan Boddu <sai.pavan.boddu@xilinx.com>2020-05-12 20:24:51 +0530
committerJason Wang <jasowang@redhat.com>2020-06-18 21:05:51 +0800
commitd48cb519b35010a90f18df915d187e566bf10c3e (patch)
tree2e57556d9e305cb5984be3b74cd24101bb587643 /hw/net
parent7ca151c381c1da146dd274c428ed7825906cc29a (diff)
net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg
Advertise support of clear-on-read for ISR registers. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'hw/net')
-rw-r--r--hw/net/cadence_gem.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 8e927ada73..2211550d2b 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -1371,7 +1371,7 @@ static void gem_reset(DeviceState *d)
s->regs[GEM_TXPARTIALSF] = 0x000003ff;
s->regs[GEM_RXPARTIALSF] = 0x000003ff;
s->regs[GEM_MODID] = s->revision;
- s->regs[GEM_DESCONF] = 0x02500111;
+ s->regs[GEM_DESCONF] = 0x02D00111;
s->regs[GEM_DESCONF2] = 0x2ab10000 | s->jumbo_max_len;
s->regs[GEM_DESCONF5] = 0x002f2045;
s->regs[GEM_DESCONF6] = GEM_DESCONF6_64B_MASK;