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authorSai Pavan Boddu <sai.pavan.boddu@xilinx.com>2020-05-12 20:24:53 +0530
committerJason Wang <jasowang@redhat.com>2020-06-18 21:05:51 +0800
commitfdd35195c5ed57162b080a20df588773768b589c (patch)
treeedd10571aa4481ff79a77f825221f1c1ef087b7a /hw/net/cadence_gem.c
parent15baf5e23743871820504be6afb1bae24d1211c2 (diff)
net: cadence_gem: TX_LAST bit should be set by guest
TX_LAST bit should not be set by hardware, its set by guest to inform the last bd of the frame. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'hw/net/cadence_gem.c')
-rw-r--r--hw/net/cadence_gem.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index df6d8186ca..78fb9acf96 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -350,11 +350,6 @@ static inline unsigned tx_desc_get_last(uint32_t *desc)
return (desc[1] & DESC_1_TX_LAST) ? 1 : 0;
}
-static inline void tx_desc_set_last(uint32_t *desc)
-{
- desc[1] |= DESC_1_TX_LAST;
-}
-
static inline unsigned tx_desc_get_length(uint32_t *desc)
{
return desc[1] & DESC_1_LENGTH;
@@ -1298,7 +1293,6 @@ static void gem_transmit(CadenceGEMState *s)
/* read next descriptor */
if (tx_desc_get_wrap(desc)) {
- tx_desc_set_last(desc);
if (s->regs[GEM_DMACFG] & GEM_DMACFG_ADDR_64B) {
packet_desc_addr = s->regs[GEM_TBQPH];