diff options
author | Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> | 2011-02-16 16:22:33 +0300 |
---|---|---|
committer | Andrzej Zaborowski <balrog@zabor.org> | 2011-02-25 09:06:16 +0100 |
commit | 3e1dbc3bd40338f19a2469feabd5f1dc5a4f5a9d (patch) | |
tree | fe0519343996e7f6ce0bbbb28ce5e0b8f76f7206 /hw/mst_fpga.c | |
parent | cf76a1ce8b7cf4b92429d67d3f4626a92b2d8a37 (diff) |
mst_fpga: correct irq level settings
Final corrections for IRQ levels that are set by mst_fpga:
* Don't retranslate IRQ if previously IRQ was masked.
* After setting or clearing IRQs through register, apply mask
before setting parent IRQ level.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
Diffstat (limited to 'hw/mst_fpga.c')
-rw-r--r-- | hw/mst_fpga.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/mst_fpga.c b/hw/mst_fpga.c index afed2acd44..407bac9716 100644 --- a/hw/mst_fpga.c +++ b/hw/mst_fpga.c @@ -50,7 +50,7 @@ static void mst_fpga_set_irq(void *opaque, int irq, int level) { mst_irq_state *s = (mst_irq_state *)opaque; - uint32_t oldint = s->intsetclr; + uint32_t oldint = s->intsetclr & s->intmskena; if (level) s->prev_level |= 1u << irq; @@ -139,7 +139,7 @@ mst_fpga_writeb(void *opaque, target_phys_addr_t addr, uint32_t value) break; case MST_INTSETCLR: /* clear or set interrupt */ s->intsetclr = (value & 0xFEEFF); - qemu_set_irq(s->parent, s->intsetclr); + qemu_set_irq(s->parent, s->intsetclr & s->intmskena); break; case MST_PCMCIA0: s->pcmcia0 = value; |