diff options
| author | Alex Bennée <alex.bennee@linaro.org> | 2014-08-04 14:41:56 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-08-04 14:41:56 +0100 |
| commit | dbb1fb277ca12acd577403575aa6a2f119ab79ea (patch) | |
| tree | f38c52a60d3aaa144d81b913596c246301117709 /hw/misc | |
| parent | dcd82c118c891571d2d7db5b4ec84d9cf3ea49b3 (diff) | |
target-arm: A64: fix TLB flush instructions
According to the ARM ARM we weren't correctly flushing the TLB entries
where bits 63:56 didn't match bit 55 of the virtual address. This
exposed a problem when we switched QEMU's internal TARGET_PAGE_BITS to
12 for aarch64.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1406733627-24255-3-git-send-email-alex.bennee@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc')
0 files changed, 0 insertions, 0 deletions