Move QOM typedefs and add missing includes

Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definitions with OBJECT_DECLARE_TYPE.

Patch generated using:

 $ ./scripts/codeconverter/converter.py -i \
   --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')

which will split "typdef struct { ... } TypedefName"
declarations.

Followed by:

 $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
    $(git grep -l '' -- '*.[ch]')

which will:
- move the typedefs and #defines above the type check macros
- add missing #include "qom/object.h" lines if necessary

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-9-ehabkost@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-10-ehabkost@redhat.com>
Message-Id: <20200831210740.126168-11-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

25 files changed, 100 insertions, 51 deletions

diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c
index 1c4addb201..e3c7b1765c 100644
--- a/hw/misc/applesmc.c
+++ b/hw/misc/applesmc.c
@@ -36,6 +36,7 @@
 #include "ui/console.h"
 #include "qemu/module.h"
 #include "qemu/timer.h"
+#include "qom/object.h"
 
 /* #define DEBUG_SMC */
 
@@ -89,9 +90,9 @@ struct AppleSMCData {
     QLIST_ENTRY(AppleSMCData) node;
 };
 
+typedef struct AppleSMCState AppleSMCState;
 #define APPLE_SMC(obj) OBJECT_CHECK(AppleSMCState, (obj), TYPE_APPLE_SMC)
 
-typedef struct AppleSMCState AppleSMCState;
 struct AppleSMCState {
     ISADevice parent_obj;
 
diff --git a/hw/misc/arm_integrator_debug.c b/hw/misc/arm_integrator_debug.c
index 3e23201ae6..4ad2b6a98b 100644
--- a/hw/misc/arm_integrator_debug.c
+++ b/hw/misc/arm_integrator_debug.c
@@ -19,15 +19,17 @@
 #include "hw/misc/arm_integrator_debug.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
+typedef struct IntegratorDebugState IntegratorDebugState;
 #define INTEGRATOR_DEBUG(obj) \
     OBJECT_CHECK(IntegratorDebugState, (obj), TYPE_INTEGRATOR_DEBUG)
 
-typedef struct {
+struct IntegratorDebugState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
-} IntegratorDebugState;
+};
 
 static uint64_t intdbg_control_read(void *opaque, hwaddr offset,
                                     unsigned size)
diff --git a/hw/misc/arm_l2x0.c b/hw/misc/arm_l2x0.c
index 2066c97f5f..f75d7988cc 100644
--- a/hw/misc/arm_l2x0.c
+++ b/hw/misc/arm_l2x0.c
@@ -24,14 +24,16 @@
 #include "migration/vmstate.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 /* L2C-310 r3p2 */
 #define CACHE_ID 0x410000c8
 
 #define TYPE_ARM_L2X0 "l2x0"
+typedef struct L2x0State L2x0State;
 #define ARM_L2X0(obj) OBJECT_CHECK(L2x0State, (obj), TYPE_ARM_L2X0)
 
-typedef struct L2x0State {
+struct L2x0State {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -42,7 +44,7 @@ typedef struct L2x0State {
     uint32_t tag_ctrl;
     uint32_t filter_start;
     uint32_t filter_end;
-} L2x0State;
+};
 
 static const VMStateDescription vmstate_l2x0 = {
     .name = "l2x0",
diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c
index a474bbdd19..a3faa516d6 100644
--- a/hw/misc/arm_sysctl.c
+++ b/hw/misc/arm_sysctl.c
@@ -18,14 +18,16 @@
 #include "hw/arm/primecell.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 #define LOCK_VALUE 0xa05f
 
 #define TYPE_ARM_SYSCTL "realview_sysctl"
+typedef struct arm_sysctl_state arm_sysctl_state;
 #define ARM_SYSCTL(obj) \
     OBJECT_CHECK(arm_sysctl_state, (obj), TYPE_ARM_SYSCTL)
 
-typedef struct {
+struct arm_sysctl_state {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -51,7 +53,7 @@ typedef struct {
     uint32_t *db_voltage;
     uint32_t db_num_clocks;
     uint32_t *db_clock_reset;
-} arm_sysctl_state;
+};
 
 static const VMStateDescription vmstate_arm_sysctl = {
     .name = "realview_sysctl",
diff --git a/hw/misc/debugexit.c b/hw/misc/debugexit.c
index 99a814f10c..6c1f9adc38 100644
--- a/hw/misc/debugexit.c
+++ b/hw/misc/debugexit.c
@@ -11,18 +11,20 @@
 #include "hw/isa/isa.h"
 #include "hw/qdev-properties.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 #define TYPE_ISA_DEBUG_EXIT_DEVICE "isa-debug-exit"
+typedef struct ISADebugExitState ISADebugExitState;
 #define ISA_DEBUG_EXIT_DEVICE(obj) \
      OBJECT_CHECK(ISADebugExitState, (obj), TYPE_ISA_DEBUG_EXIT_DEVICE)
 
-typedef struct ISADebugExitState {
+struct ISADebugExitState {
     ISADevice parent_obj;
 
     uint32_t iobase;
     uint32_t iosize;
     MemoryRegion io;
-} ISADebugExitState;
+};
 
 static uint64_t debug_exit_read(void *opaque, hwaddr addr, unsigned size)
 {
diff --git a/hw/misc/eccmemctl.c b/hw/misc/eccmemctl.c
index aec447368e..47bec04c8e 100644
--- a/hw/misc/eccmemctl.c
+++ b/hw/misc/eccmemctl.c
@@ -29,6 +29,7 @@
 #include "migration/vmstate.h"
 #include "qemu/module.h"
 #include "trace.h"
+#include "qom/object.h"
 
 /* There are 3 versions of this chip used in SMP sun4m systems:
  * MCC (version 0, implementation 0) SS-600MP
@@ -126,9 +127,10 @@
 #define ECC_DIAG_MASK  (ECC_DIAG_SIZE - 1)
 
 #define TYPE_ECC_MEMCTL "eccmemctl"
+typedef struct ECCState ECCState;
 #define ECC_MEMCTL(obj) OBJECT_CHECK(ECCState, (obj), TYPE_ECC_MEMCTL)
 
-typedef struct ECCState {
+struct ECCState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem, iomem_diag;
@@ -136,7 +138,7 @@ typedef struct ECCState {
     uint32_t regs[ECC_NREGS];
     uint8_t diag[ECC_DIAG_SIZE];
     uint32_t version;
-} ECCState;
+};
 
 static void ecc_mem_write(void *opaque, hwaddr addr, uint64_t val,
                           unsigned size)
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index ec617e63f3..2db9d63eeb 100644
--- a/hw/misc/edu.c
+++ b/hw/misc/edu.c
@@ -28,11 +28,13 @@
 #include "hw/hw.h"
 #include "hw/pci/msi.h"
 #include "qemu/timer.h"
+#include "qom/object.h"
 #include "qemu/main-loop.h" /* iothread mutex */
 #include "qemu/module.h"
 #include "qapi/visitor.h"
 
 #define TYPE_PCI_EDU_DEVICE "edu"
+typedef struct EduState EduState;
 #define EDU(obj)        OBJECT_CHECK(EduState, obj, TYPE_PCI_EDU_DEVICE)
 
 #define FACT_IRQ        0x00000001
@@ -41,7 +43,7 @@
 #define DMA_START       0x40000
 #define DMA_SIZE        4096
 
-typedef struct {
+struct EduState {
     PCIDevice pdev;
     MemoryRegion mmio;
 
@@ -72,7 +74,7 @@ typedef struct {
     QEMUTimer dma_timer;
     char dma_buf[DMA_SIZE];
     uint64_t dma_mask;
-} EduState;
+};
 
 static bool edu_msi_enabled(EduState *edu)
 {
diff --git a/hw/misc/empty_slot.c b/hw/misc/empty_slot.c
index 9a011b1c11..ec3e510b3e 100644
--- a/hw/misc/empty_slot.c
+++ b/hw/misc/empty_slot.c
@@ -15,17 +15,19 @@
 #include "hw/misc/empty_slot.h"
 #include "qapi/error.h"
 #include "trace.h"
+#include "qom/object.h"
 
 #define TYPE_EMPTY_SLOT "empty_slot"
+typedef struct EmptySlot EmptySlot;
 #define EMPTY_SLOT(obj) OBJECT_CHECK(EmptySlot, (obj), TYPE_EMPTY_SLOT)
 
-typedef struct EmptySlot {
+struct EmptySlot {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
     char *name;
     uint64_t size;
-} EmptySlot;
+};
 
 static uint64_t empty_slot_read(void *opaque, hwaddr addr,
                                 unsigned size)
diff --git a/hw/misc/exynos4210_clk.c b/hw/misc/exynos4210_clk.c
index bc1463ff89..c54f360aa8 100644
--- a/hw/misc/exynos4210_clk.c
+++ b/hw/misc/exynos4210_clk.c
@@ -22,8 +22,10 @@
 #include "migration/vmstate.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 #define TYPE_EXYNOS4210_CLK             "exynos4210.clk"
+typedef struct Exynos4210ClkState Exynos4210ClkState;
 #define EXYNOS4210_CLK(obj) \
     OBJECT_CHECK(Exynos4210ClkState, (obj), TYPE_EXYNOS4210_CLK)
 
@@ -55,12 +57,12 @@ static const Exynos4210Reg exynos4210_clk_regs[] = {
 
 #define EXYNOS4210_REGS_NUM       ARRAY_SIZE(exynos4210_clk_regs)
 
-typedef struct Exynos4210ClkState {
+struct Exynos4210ClkState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
     uint32_t reg[EXYNOS4210_REGS_NUM];
-} Exynos4210ClkState;
+};
 
 static uint64_t exynos4210_clk_read(void *opaque, hwaddr offset,
                                     unsigned size)
diff --git a/hw/misc/exynos4210_pmu.c b/hw/misc/exynos4210_pmu.c
index 500f28343f..e6bbb1f7c8 100644
--- a/hw/misc/exynos4210_pmu.c
+++ b/hw/misc/exynos4210_pmu.c
@@ -29,6 +29,7 @@
 #include "migration/vmstate.h"
 #include "qemu/module.h"
 #include "sysemu/runstate.h"
+#include "qom/object.h"
 
 #ifndef DEBUG_PMU
 #define DEBUG_PMU           0
@@ -394,15 +395,16 @@ static const Exynos4210PmuReg exynos4210_pmu_regs[] = {
 #define PMU_NUM_OF_REGISTERS ARRAY_SIZE(exynos4210_pmu_regs)
 
 #define TYPE_EXYNOS4210_PMU "exynos4210.pmu"
+typedef struct Exynos4210PmuState Exynos4210PmuState;
 #define EXYNOS4210_PMU(obj) \
     OBJECT_CHECK(Exynos4210PmuState, (obj), TYPE_EXYNOS4210_PMU)
 
-typedef struct Exynos4210PmuState {
+struct Exynos4210PmuState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
     uint32_t reg[PMU_NUM_OF_REGISTERS];
-} Exynos4210PmuState;
+};
 
 static void exynos4210_pmu_poweroff(void)
 {
diff --git a/hw/misc/exynos4210_rng.c b/hw/misc/exynos4210_rng.c
index 38cd61c7ea..3e2ec4f543 100644
--- a/hw/misc/exynos4210_rng.c
+++ b/hw/misc/exynos4210_rng.c
@@ -24,6 +24,7 @@
 #include "qemu/log.h"
 #include "qemu/guest-random.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 #define DEBUG_EXYNOS_RNG 0
 
@@ -35,6 +36,7 @@
     } while (0)
 
 #define TYPE_EXYNOS4210_RNG             "exynos4210.rng"
+typedef struct Exynos4210RngState Exynos4210RngState;
 #define EXYNOS4210_RNG(obj) \
     OBJECT_CHECK(Exynos4210RngState, (obj), TYPE_EXYNOS4210_RNG)
 
@@ -68,7 +70,7 @@
 
 #define EXYNOS4210_RNG_REGS_MEM_SIZE            0x200
 
-typedef struct Exynos4210RngState {
+struct Exynos4210RngState {
     SysBusDevice parent_obj;
     MemoryRegion iomem;
 
@@ -79,7 +81,7 @@ typedef struct Exynos4210RngState {
     /* Register values */
     uint32_t reg_control;
     uint32_t reg_status;
-} Exynos4210RngState;
+};
 
 static bool exynos4210_rng_seed_ready(const Exynos4210RngState *s)
 {
diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
index 2b6882face..1f65f6f2ac 100644
--- a/hw/misc/ivshmem.c
+++ b/hw/misc/ivshmem.c
@@ -38,6 +38,7 @@
 #include "qapi/visitor.h"
 
 #include "hw/misc/ivshmem.h"
+#include "qom/object.h"
 
 #define PCI_VENDOR_ID_IVSHMEM   PCI_VENDOR_ID_REDHAT_QUMRANET
 #define PCI_DEVICE_ID_IVSHMEM   0x1110
@@ -57,6 +58,7 @@
     } while (0)
 
 #define TYPE_IVSHMEM_COMMON "ivshmem-common"
+typedef struct IVShmemState IVShmemState;
 #define IVSHMEM_COMMON(obj) \
     OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_COMMON)
 
@@ -83,7 +85,7 @@ typedef struct MSIVector {
     bool unmasked;
 } MSIVector;
 
-typedef struct IVShmemState {
+struct IVShmemState {
     /*< private >*/
     PCIDevice parent_obj;
     /*< public >*/
@@ -115,7 +117,7 @@ typedef struct IVShmemState {
     /* migration stuff */
     OnOffAuto master;
     Error *migration_blocker;
-} IVShmemState;
+};
 
 /* registers for the Inter-VM shared memory device */
 enum ivshmem_registers {
diff --git a/hw/misc/milkymist-hpdmc.c b/hw/misc/milkymist-hpdmc.c
index 61e86e6b34..cf3ed5a49c 100644
--- a/hw/misc/milkymist-hpdmc.c
+++ b/hw/misc/milkymist-hpdmc.c
@@ -27,6 +27,7 @@
 #include "trace.h"
 #include "qemu/error-report.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 enum {
     R_SYSTEM = 0,
@@ -43,6 +44,7 @@ enum {
 };
 
 #define TYPE_MILKYMIST_HPDMC "milkymist-hpdmc"
+typedef struct MilkymistHpdmcState MilkymistHpdmcState;
 #define MILKYMIST_HPDMC(obj) \
     OBJECT_CHECK(MilkymistHpdmcState, (obj), TYPE_MILKYMIST_HPDMC)
 
@@ -53,7 +55,6 @@ struct MilkymistHpdmcState {
 
     uint32_t regs[R_MAX];
 };
-typedef struct MilkymistHpdmcState MilkymistHpdmcState;
 
 static uint64_t hpdmc_read(void *opaque, hwaddr addr,
                            unsigned size)
diff --git a/hw/misc/milkymist-pfpu.c b/hw/misc/milkymist-pfpu.c
index 516825e83d..81251792c1 100644
--- a/hw/misc/milkymist-pfpu.c
+++ b/hw/misc/milkymist-pfpu.c
@@ -31,6 +31,7 @@
 #include "qemu/module.h"
 #include "qemu/error-report.h"
 #include <math.h>
+#include "qom/object.h"
 
 /* #define TRACE_EXEC */
 
@@ -120,6 +121,7 @@ static const char *opcode_to_str[] = {
 #endif
 
 #define TYPE_MILKYMIST_PFPU "milkymist-pfpu"
+typedef struct MilkymistPFPUState MilkymistPFPUState;
 #define MILKYMIST_PFPU(obj) \
     OBJECT_CHECK(MilkymistPFPUState, (obj), TYPE_MILKYMIST_PFPU)
 
@@ -137,7 +139,6 @@ struct MilkymistPFPUState {
     int output_queue_pos;
     uint32_t output_queue[MAX_LATENCY];
 };
-typedef struct MilkymistPFPUState MilkymistPFPUState;
 
 static inline uint32_t
 get_dma_address(uint32_t base, uint32_t x, uint32_t y)
diff --git a/hw/misc/mst_fpga.c b/hw/misc/mst_fpga.c
index 81abdf8ede..314dd5fcbd 100644
--- a/hw/misc/mst_fpga.c
+++ b/hw/misc/mst_fpga.c
@@ -16,6 +16,7 @@
 #include "hw/sysbus.h"
 #include "migration/vmstate.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 /* Mainstone FPGA for extern irqs */
 #define FPGA_GPIO_PIN	0
@@ -40,10 +41,11 @@
 #define MST_PCMCIA_CD1_IRQ	13
 
 #define TYPE_MAINSTONE_FPGA "mainstone-fpga"
+typedef struct mst_irq_state mst_irq_state;
 #define MAINSTONE_FPGA(obj) \
     OBJECT_CHECK(mst_irq_state, (obj), TYPE_MAINSTONE_FPGA)
 
-typedef struct mst_irq_state{
+struct mst_irq_state {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -63,7 +65,7 @@ typedef struct mst_irq_state{
     uint32_t intsetclr;
     uint32_t pcmcia0;
     uint32_t pcmcia1;
-}mst_irq_state;
+};
 
 static void
 mst_fpga_set_irq(void *opaque, int irq, int level)
diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c
index 8aa8e6549f..b7f3fcb254 100644
--- a/hw/misc/pc-testdev.c
+++ b/hw/misc/pc-testdev.c
@@ -39,10 +39,11 @@
 #include "qemu/module.h"
 #include "hw/irq.h"
 #include "hw/isa/isa.h"
+#include "qom/object.h"
 
 #define IOMEM_LEN    0x10000
 
-typedef struct PCTestdev {
+struct PCTestdev {
     ISADevice parent_obj;
 
     MemoryRegion ioport;
@@ -52,7 +53,8 @@ typedef struct PCTestdev {
     MemoryRegion iomem;
     uint32_t ioport_data;
     char iomem_buf[IOMEM_LEN];
-} PCTestdev;
+};
+typedef struct PCTestdev PCTestdev;
 
 #define TYPE_TESTDEV "pc-testdev"
 #define TESTDEV(obj) \
diff --git a/hw/misc/pca9552.c b/hw/misc/pca9552.c
index e4ccdeaf78..9cd51b1afd 100644
--- a/hw/misc/pca9552.c
+++ b/hw/misc/pca9552.c
@@ -22,15 +22,17 @@
 #include "qapi/error.h"
 #include "qapi/visitor.h"
 #include "trace.h"
+#include "qom/object.h"
 
-typedef struct PCA955xClass {
+struct PCA955xClass {
     /*< private >*/
     I2CSlaveClass parent_class;
     /*< public >*/
 
     uint8_t pin_count;
     uint8_t max_reg;
-} PCA955xClass;
+};
+typedef struct PCA955xClass PCA955xClass;
 
 #define PCA955X_CLASS(klass) \
     OBJECT_CLASS_CHECK(PCA955xClass, (klass), TYPE_PCA955X)
diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c
index 188de4d9cc..db6d0d5a71 100644
--- a/hw/misc/pci-testdev.c
+++ b/hw/misc/pci-testdev.c
@@ -24,6 +24,7 @@
 #include "qemu/event_notifier.h"
 #include "qemu/module.h"
 #include "sysemu/kvm.h"
+#include "qom/object.h"
 
 typedef struct PCITestDevHdr {
     uint8_t test;
@@ -78,7 +79,7 @@ enum {
 #define IOTEST_ACCESS_TYPE uint8_t
 #define IOTEST_ACCESS_WIDTH (sizeof(uint8_t))
 
-typedef struct PCITestDevState {
+struct PCITestDevState {
     /*< private >*/
     PCIDevice parent_obj;
     /*< public >*/
@@ -90,7 +91,8 @@ typedef struct PCITestDevState {
 
     uint64_t membar_size;
     MemoryRegion membar;
-} PCITestDevState;
+};
+typedef struct PCITestDevState PCITestDevState;
 
 #define TYPE_PCI_TEST_DEV "pci-testdev"
 
diff --git a/hw/misc/puv3_pm.c b/hw/misc/puv3_pm.c
index 8989d363cd..e549c0ff21 100644
--- a/hw/misc/puv3_pm.c
+++ b/hw/misc/puv3_pm.c
@@ -11,6 +11,7 @@
 
 #include "qemu/osdep.h"
 #include "hw/sysbus.h"
+#include "qom/object.h"
 
 #undef DEBUG_PUV3
 #include "hw/unicore32/puv3.h"
@@ -18,9 +19,10 @@
 #include "qemu/log.h"
 
 #define TYPE_PUV3_PM "puv3_pm"
+typedef struct PUV3PMState PUV3PMState;
 #define PUV3_PM(obj) OBJECT_CHECK(PUV3PMState, (obj), TYPE_PUV3_PM)
 
-typedef struct PUV3PMState {
+struct PUV3PMState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -31,7 +33,7 @@ typedef struct PUV3PMState {
     uint32_t reg_PLL_DDR_CFG;
     uint32_t reg_PLL_VGA_CFG;
     uint32_t reg_DIVCFG;
-} PUV3PMState;
+};
 
 static uint64_t puv3_pm_read(void *opaque, hwaddr offset,
         unsigned size)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index abb10bbcaf..894c67e6cc 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -20,6 +20,7 @@
 #include "hw/nvram/fw_cfg.h"
 #include "hw/qdev-properties.h"
 #include "hw/misc/pvpanic.h"
+#include "qom/object.h"
 
 /* The bit of supported pv event, TODO: include uapi header and remove this */
 #define PVPANIC_F_PANICKED      0
@@ -29,6 +30,7 @@
 #define PVPANIC_PANICKED        (1 << PVPANIC_F_PANICKED)
 #define PVPANIC_CRASHLOADED     (1 << PVPANIC_F_CRASHLOADED)
 
+typedef struct PVPanicState PVPanicState;
 #define ISA_PVPANIC_DEVICE(obj)    \
     OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
 
@@ -54,12 +56,12 @@ static void handle_event(int event)
 
 #include "hw/isa/isa.h"
 
-typedef struct PVPanicState {
+struct PVPanicState {
     ISADevice parent_obj;
 
     MemoryRegion io;
     uint16_t ioport;
-} PVPanicState;
+};
 
 /* return supported events on read */
 static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
diff --git a/hw/misc/sga.c b/hw/misc/sga.c
index 6866bf72cb..e5cc2da3d3 100644
--- a/hw/misc/sga.c
+++ b/hw/misc/sga.c
@@ -29,15 +29,17 @@
 #include "hw/isa/isa.h"
 #include "hw/loader.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 #define SGABIOS_FILENAME "sgabios.bin"
 
 #define TYPE_SGA "sga"
+typedef struct ISASGAState ISASGAState;
 #define SGA(obj) OBJECT_CHECK(ISASGAState, (obj), TYPE_SGA)
 
-typedef struct ISASGAState {
+struct ISASGAState {
     ISADevice parent_obj;
-} ISASGAState;
+};
 
 static void sga_realizefn(DeviceState *dev, Error **errp)
 {
diff --git a/hw/misc/slavio_misc.c b/hw/misc/slavio_misc.c
index 279b38dfc7..f1a039b5a9 100644
--- a/hw/misc/slavio_misc.c
+++ b/hw/misc/slavio_misc.c
@@ -29,6 +29,7 @@
 #include "qemu/module.h"
 #include "sysemu/runstate.h"
 #include "trace.h"
+#include "qom/object.h"
 
 /*
  * This is the auxio port, chip control and system control part of
@@ -39,9 +40,10 @@
  */
 
 #define TYPE_SLAVIO_MISC "slavio_misc"
+typedef struct MiscState MiscState;
 #define SLAVIO_MISC(obj) OBJECT_CHECK(MiscState, (obj), TYPE_SLAVIO_MISC)
 
-typedef struct MiscState {
+struct MiscState {
     SysBusDevice parent_obj;
 
     MemoryRegion cfg_iomem;
@@ -59,17 +61,18 @@ typedef struct MiscState {
     uint8_t diag, mctrl;
     uint8_t sysctrl;
     uint16_t leds;
-} MiscState;
+};
 
 #define TYPE_APC "apc"
+typedef struct APCState APCState;
 #define APC(obj) OBJECT_CHECK(APCState, (obj), TYPE_APC)
 
-typedef struct APCState {
+struct APCState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
     qemu_irq cpu_halt;
-} APCState;
+};
 
 #define MISC_SIZE 1
 #define LED_SIZE 2
diff --git a/hw/misc/tmp105.h b/hw/misc/tmp105.h
index 9ba05ecc9c..634bb4a0d6 100644
--- a/hw/misc/tmp105.h
+++ b/hw/misc/tmp105.h
@@ -16,8 +16,10 @@
 
 #include "hw/i2c/i2c.h"
 #include "hw/misc/tmp105_regs.h"
+#include "qom/object.h"
 
 #define TYPE_TMP105 "tmp105"
+typedef struct TMP105State TMP105State;
 #define TMP105(obj) OBJECT_CHECK(TMP105State, (obj), TYPE_TMP105)
 
 /**
@@ -27,7 +29,7 @@
  *
  * @see_also: http://www.ti.com/lit/gpn/tmp105
  */
-typedef struct TMP105State {
+struct TMP105State {
     /*< private >*/
     I2CSlave i2c;
     /*< public >*/
@@ -42,6 +44,6 @@ typedef struct TMP105State {
     int16_t limit[2];
     int faults;
     uint8_t alarm;
-} TMP105State;
+};
 
 #endif
diff --git a/hw/misc/tmp421.c b/hw/misc/tmp421.c
index 49abe2d246..a289c83360 100644
--- a/hw/misc/tmp421.c
+++ b/hw/misc/tmp421.c
@@ -30,6 +30,7 @@
 #include "qapi/error.h"
 #include "qapi/visitor.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 /* Manufacturer / Device ID's */
 #define TMP421_MANUFACTURER_ID          0x55
@@ -48,7 +49,7 @@ static const DeviceInfo devices[] = {
     { TMP423_DEVICE_ID, "tmp423" },
 };
 
-typedef struct TMP421State {
+struct TMP421State {
     /*< private >*/
     I2CSlave i2c;
     /*< public >*/
@@ -63,12 +64,14 @@ typedef struct TMP421State {
     uint8_t buf[2];
     uint8_t pointer;
 
-} TMP421State;
+};
+typedef struct TMP421State TMP421State;
 
-typedef struct TMP421Class {
+struct TMP421Class {
     I2CSlaveClass parent_class;
     DeviceInfo *dev;
-} TMP421Class;
+};
+typedef struct TMP421Class TMP421Class;
 
 #define TYPE_TMP421 "tmp421-generic"
 #define TMP421(obj) OBJECT_CHECK(TMP421State, (obj), TYPE_TMP421)
diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c
index f7472d1f3c..223f533ce8 100644
--- a/hw/misc/zynq_slcr.c
+++ b/hw/misc/zynq_slcr.c
@@ -23,6 +23,7 @@
 #include "qemu/module.h"
 #include "hw/registerfields.h"
 #include "hw/qdev-clock.h"
+#include "qom/object.h"
 
 #ifndef ZYNQ_SLCR_ERR_DEBUG
 #define ZYNQ_SLCR_ERR_DEBUG 0
@@ -182,9 +183,10 @@ REG32(DDRIOB, 0xb40)
 #define ZYNQ_SLCR_NUM_REGS      (ZYNQ_SLCR_MMIO_SIZE / 4)
 
 #define TYPE_ZYNQ_SLCR "xilinx,zynq_slcr"
+typedef struct ZynqSLCRState ZynqSLCRState;
 #define ZYNQ_SLCR(obj) OBJECT_CHECK(ZynqSLCRState, (obj), TYPE_ZYNQ_SLCR)
 
-typedef struct ZynqSLCRState {
+struct ZynqSLCRState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -194,7 +196,7 @@ typedef struct ZynqSLCRState {
     Clock *ps_clk;
     Clock *uart0_ref_clk;
     Clock *uart1_ref_clk;
-} ZynqSLCRState;
+};
 
 /*
  * return the output frequency of ARM/DDR/IO pll