diff options
| author | Alistair Francis <alistair@alistair23.me> | 2020-01-17 14:09:29 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-01-17 14:09:29 +0000 |
| commit | 870c034da0be2207e1b535cb6897958556fa0380 (patch) | |
| tree | 75593bc7e9c3773361db30e2da356ffe7efb627c /hw/misc/trace-events | |
| parent | cbf01142b2aef0c0b4e995cecd7e79d342bbc47e (diff) | |
hw/misc: Add the STM32F4xx Sysconfig device
Signed-off-by: Alistair Francis <alistair@alistair23.me>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 49b01423a09cef2ca832ff73a84a996568f1a8fc.1576658572.git.alistair@alistair23.me
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc/trace-events')
| -rw-r--r-- | hw/misc/trace-events | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 2e0c820834..44b4f72f57 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -84,6 +84,12 @@ mos6522_set_sr_int(void) "set sr_int" mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64 mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x" +# stm32f4xx_syscfg +stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interupt: GPIO: %d, Line: %d; Level: %d" +stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d" +stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " " +stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 "" + # tz-mpc.c tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u" tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u" |