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authorGreg Ungerer <gerg@uclinux.org>2015-06-19 23:43:26 +1000
committerPeter Maydell <peter.maydell@linaro.org>2015-06-22 14:43:25 +0100
commit0c8ff723bd29e5c8b2ca989f857ae5c37ec49c4e (patch)
treec9ba13e130566ab1d7cf808573b10afac5f39a71 /hw/misc/omap_sdrc.c
parent2a8327e8a8288e301a2f01bc3ca2d465a3a4ca78 (diff)
m68k: fix usp processing on interrupt entry and exception exit
The action to potentially switch sp register is not occurring at the correct point in the interrupt entry or exception exit sequences. For the interrupt entry case the sp on entry is used to create the stack exception frame - but this may well be the user stack pointer, since we haven't done the switch yet. Re-order the flow to switch the sp regs then use the current sp to create the exception frame. For the return from exception case the code is unwinding the sp after switching sp registers. But it should always unwind the supervisor sp first, then carry out any required sp switch. Note that these problems don't effect operation unless the user sp bit is set in the CACR register. Only a single sp is used in the default power up state. Previously Linux only used this single sp mode. But modern versions of Linux use the user sp mode now, so we need correct behavior for Linux to work. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Message-id: 1434721406-25288-4-git-send-email-gerg@uclinux.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc/omap_sdrc.c')
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