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authorEdgar E. Iglesias <edgar.iglesias@amd.com>2022-04-06 18:43:02 +0100
committerPeter Maydell <peter.maydell@linaro.org>2022-04-21 11:37:03 +0100
commit369e5cb0c948b65e0845ca3394e25d757dd93206 (patch)
treed5f0ebf016671a733ddc87b4717f6a342f7998f4 /hw/misc/meson.build
parent67a645a35110f300144ae844cbf839762abcd98d (diff)
hw/misc: Add a model of the Xilinx Versal CRL
Add a model of the Xilinx Versal CRL. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Frederic Konrad <fkonrad@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Message-id: 20220406174303.2022038-4-edgar.iglesias@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc/meson.build')
-rw-r--r--hw/misc/meson.build1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 6fb69612e0..2ff05c7afa 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -86,6 +86,7 @@ softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_misc.c'))
softmmu_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c'))
specific_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-crf.c'))
specific_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-apu-ctrl.c'))
+specific_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-crl.c'))
softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files(
'xlnx-versal-xramc.c',
'xlnx-versal-pmc-iou-slcr.c',