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author | Cédric Le Goater <clg@kaod.org> | 2019-09-25 16:32:31 +0200 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2019-10-15 18:09:04 +0100 |
commit | c20375dd8678eae2462a986938e6d119cb5abefa (patch) | |
tree | 1f7622b8bbe5e525cc00386d6cae57835ffd8ab5 /hw/misc/aspeed_sdmc.c | |
parent | d85c87c1d1bf4353a4cb2c19988f81b9c667f7c6 (diff) |
aspeed/timer: Add AST2600 support
The AST2600 timer has a third control register that is used to
implement a set-to-clear feature for the main control register.
On the AST2600, it is not configurable via 0x38 (control register 3)
as it is on the AST2500.
Based on previous work from Joel Stanley.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-7-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc/aspeed_sdmc.c')
0 files changed, 0 insertions, 0 deletions