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| author | Leon Alrae <leon.alrae@imgtec.com> | 2016-06-09 10:46:50 +0100 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2016-07-12 09:10:14 +0100 |
| commit | 89777fd10fc3dd573c3b4d1b2efdd10af823c001 (patch) | |
| tree | 0b761b2e015b2925b09528a20cab1035a53ce79d /hw/misc/arm11scu.c | |
| parent | 19494f811a43c6bc226aa272d86300d9229224fe (diff) | |
target-mips: add exception base to MIPS CPU
Replace hardcoded 0xbfc00000 with exception_base which is initialized with
this default address so there is no functional change here.
However, it is now exposed and consequently it will be possible to modify
it from outside of the CPU.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'hw/misc/arm11scu.c')
0 files changed, 0 insertions, 0 deletions