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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-04 21:42:11 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-04 21:42:11 +0000
commitb6cd0ea1205dd4623ccfe796ee6c1a4da3141d99 (patch)
tree605d7f0c534aeeeb2d8f077593638db7dc34c149 /hw/mips_malta.c
parent6936bfe514bbac7af4b24fad9ed9688b78b5be69 (diff)
8250: Customized base baudrate
(Jan Kiszka) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4336 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/mips_malta.c')
-rw-r--r--hw/mips_malta.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index b9b9a84dd2..cc31082e20 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -449,7 +449,8 @@ static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env)
uart_chr = qemu_chr_open("vc:80Cx24C");
qemu_chr_printf(uart_chr, "CBUS UART\r\n");
- s->uart = serial_mm_init(base + 0x900, 3, env->irq[2], uart_chr, 1);
+ s->uart =
+ serial_mm_init(base + 0x900, 3, env->irq[2], 230400, uart_chr, 1);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
@@ -918,9 +919,9 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
i8042_init(i8259[1], i8259[12], 0x60);
rtc_state = rtc_init(0x70, i8259[8]);
if (serial_hds[0])
- serial_init(0x3f8, i8259[4], serial_hds[0]);
+ serial_init(0x3f8, i8259[4], 115200, serial_hds[0]);
if (serial_hds[1])
- serial_init(0x2f8, i8259[3], serial_hds[1]);
+ serial_init(0x2f8, i8259[3], 115200, serial_hds[1]);
if (parallel_hds[0])
parallel_init(0x378, i8259[7], parallel_hds[0]);
for(i = 0; i < MAX_FD; i++) {