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authorBlue Swirl <blauwirbel@gmail.com>2010-03-29 19:23:56 +0000
committerBlue Swirl <blauwirbel@gmail.com>2010-03-29 19:23:56 +0000
commit3d08ff698b938613699682b5c5432547a7ebe898 (patch)
treed5613c54e9bb1ce20d5e26db288d99d2a00ad128 /hw/mips_malta.c
parent5f9fc5ad7efe2840d3170775768fb85686d94869 (diff)
Compile pflash_cfi01 only once
Push TARGET_WORDS_BIGENDIAN dependency to board level. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/mips_malta.c')
-rw-r--r--hw/mips_malta.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index e4e7507f0c..586c1c3b2f 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -789,6 +789,7 @@ void mips_malta_init (ram_addr_t ram_size,
DriveInfo *fd[MAX_FD];
int fl_idx = 0;
int fl_sectors = 0;
+ int be;
/* Make sure the first 3 serial ports are associated with a device. */
for(i = 0; i < 3; i++) {
@@ -833,6 +834,11 @@ void mips_malta_init (ram_addr_t ram_size,
cpu_register_physical_memory(0x1fc00000LL,
BIOS_SIZE, bios_offset | IO_MEM_ROM);
+#ifdef TARGET_WORDS_BIGENDIAN
+ be = 1;
+#else
+ be = 0;
+#endif
/* FPGA */
malta_fpga = malta_fpga_init(0x1f000000LL, env->irq[2], serial_hds[2]);
@@ -859,7 +865,7 @@ void mips_malta_init (ram_addr_t ram_size,
#endif
pflash_cfi01_register(0x1e000000LL, bios_offset,
dinfo->bdrv, 65536, fl_sectors,
- 4, 0x0000, 0x0000, 0x0000, 0x0000);
+ 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
fl_idx++;
} else {
/* Load a BIOS image. */