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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-03-31 16:54:14 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-03-31 16:54:14 +0000
commita4bc3afc09b27cca4adfc1500551cc9a36219edf (patch)
treebc54c912d3168617304742b1a1a2e904d01dbcfc /hw/mips_int.c
parentc62db10577295ed4dc26fa9acd6e6f30cea7ffd0 (diff)
Malta CBUS UART support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/mips_int.c')
-rw-r--r--hw/mips_int.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/mips_int.c b/hw/mips_int.c
index b384b64d28..ed489f1a16 100644
--- a/hw/mips_int.c
+++ b/hw/mips_int.c
@@ -27,7 +27,7 @@ void cpu_mips_irq_request(void *opaque, int irq, int level)
if (level) {
env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
} else {
- env->CP0_Cause &= ~(1 << (irq +CP0Ca_IP));
+ env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
}
cpu_mips_update_irq(env);
}