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authorAurelien Jarno <aurelien@aurel32.net>2010-07-25 16:51:29 +0200
committerAurelien Jarno <aurelien@aurel32.net>2010-07-25 16:54:02 +0200
commit5dc5d9f055c59701519d1212078a298d92411cf6 (patch)
treed74d17185122335f899d768ff050ccff05b02e99 /hw/mips_int.c
parenta5efa6441cdda002a4b14c982098424dd60a55d0 (diff)
mips: more fixes to the MIPS interrupt glue logic
Commit 36388314febad3d7675ab919287f03733a560ff6 moved most of the interrupt logic to cpu-exec.c. Remove the remaining useless code and fix software interrupts. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Edgar E. Iglesias <edgar@axis.com> Tested-by: Edgar E. Iglesias <edgar@axis.com>
Diffstat (limited to 'hw/mips_int.c')
-rw-r--r--hw/mips_int.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/hw/mips_int.c b/hw/mips_int.c
index 80488baeba..477f6abf95 100644
--- a/hw/mips_int.c
+++ b/hw/mips_int.c
@@ -54,3 +54,12 @@ void cpu_mips_irq_init_cpu(CPUState *env)
env->irq[i] = qi[i];
}
}
+
+void cpu_mips_soft_irq(CPUState *env, int irq, int level)
+{
+ if (irq < 0 || irq > 2) {
+ return;
+ }
+
+ qemu_set_irq(env->irq[irq], level);
+}