diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-07 22:32:49 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-13 19:58:54 +0100 |
| commit | ac70f9767cba3a5966f7eefc102fcda8b3c7d09e (patch) | |
| tree | a511e97d95af30981bfd6fd4c9201299af6132c8 /hw/mips | |
| parent | 1ab3a0de2f40f70bdfbd1a319a9734089bddcf72 (diff) | |
target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()
As cpu_supports_isa() / cpu_supports_cps_smp() take a 'cpu_type'
name argument, rename them cpu_type_supports_FEAT().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201207215257.4004222-2-f4bug@amsat.org>
Diffstat (limited to 'hw/mips')
| -rw-r--r-- | hw/mips/boston.c | 4 | ||||
| -rw-r--r-- | hw/mips/malta.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 3d40867dc4..16467ea475 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -459,12 +459,12 @@ static void boston_mach_init(MachineState *machine) s = BOSTON(dev); s->mach = machine; - if (!cpu_supports_cps_smp(machine->cpu_type)) { + if (!cpu_type_supports_cps_smp(machine->cpu_type)) { error_report("Boston requires CPUs which support CPS"); exit(1); } - is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64); + is_64b = cpu_type_supports_isa(machine->cpu_type, ISA_MIPS64); object_initialize_child(OBJECT(machine), "cps", &s->cps, TYPE_MIPS_CPS); object_property_set_str(OBJECT(&s->cps), "cpu-type", machine->cpu_type, diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 5c11eecec1..4651a1055c 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1205,7 +1205,7 @@ static void create_cps(MachineState *ms, MaltaState *s, static void mips_create_cpu(MachineState *ms, MaltaState *s, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { - if ((ms->smp.cpus > 1) && cpu_supports_cps_smp(ms->cpu_type)) { + if ((ms->smp.cpus > 1) && cpu_type_supports_cps_smp(ms->cpu_type)) { create_cps(ms, s, cbus_irq, i8259_irq); } else { create_cpu_without_cps(ms, s, cbus_irq, i8259_irq); @@ -1309,7 +1309,7 @@ void mips_malta_init(MachineState *machine) loaderparams.initrd_filename = initrd_filename; kernel_entry = load_kernel(); - if (!cpu_supports_isa(machine->cpu_type, ISA_NANOMIPS32)) { + if (!cpu_type_supports_isa(machine->cpu_type, ISA_NANOMIPS32)) { write_bootloader(memory_region_get_ram_ptr(bios), bootloader_run_addr, kernel_entry); } else { |