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authorPaolo Bonzini <pbonzini@redhat.com>2014-02-07 15:47:46 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-02-10 18:10:43 +0000
commita87f39543a9259f671c5413723311180ee2ad2a8 (patch)
tree53c42691028566ae1d64a4a911b151d97c55ad35 /hw/mips
parent1f6b12f75f2c22f861d0202374033a7594c91707 (diff)
memory: fix limiting of translation at a page boundary
Commit 360e607 (address_space_translate: do not cross page boundaries, 2014-01-30) broke MMIO accesses in cases where the section is shorter than the full register width. This can happen for example with the Bochs DISPI registers, which are 16 bits wide but have only a 1-byte long MemoryRegion (if you write to the "second byte" of the register your access is discarded; it doesn't write only to half of the register). Restrict the action of commit 360e607 to direct RAM accesses. This is enough for Xen, since MMIO will not go through the mapcache. Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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