diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2019-08-02 17:04:58 +0100 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-09-12 18:25:34 +0200 |
| commit | 6626286e50d813e1ee79629cb5699c8c2d09fdda (patch) | |
| tree | e2ffd4c4f029600535c329273ec0d8f18c7525b3 /hw/mips/mips_jazz.c | |
| parent | 4f02a06d50ef0081089ed8cb3ec7c7986e3c95f8 (diff) | |
hw/mips/mips_jazz: Remove no-longer-necessary override of do_unassigned_access
Now that the MIPS CPU implementation uses the new
do_transaction_failed hook, we can remove the old code that handled
the do_unassigned_access hook.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Hervé Poussineau <hpoussin@reactos.org>
Message-Id: <20190802160458.25681-4-peter.maydell@linaro.org>
Diffstat (limited to 'hw/mips/mips_jazz.c')
| -rw-r--r-- | hw/mips/mips_jazz.c | 27 |
1 files changed, 4 insertions, 23 deletions
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index 1a8e847687..c967b97d80 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -111,18 +111,6 @@ static const MemoryRegionOps dma_dummy_ops = { #define MAGNUM_BIOS_SIZE_MAX 0x7e000 #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX) -static CPUUnassignedAccess real_do_unassigned_access; -static void mips_jazz_do_unassigned_access(CPUState *cpu, hwaddr addr, - bool is_write, bool is_exec, - int opaque, unsigned size) -{ - if (!is_exec) { - /* ignore invalid access (ie do not raise exception) */ - return; - } - (*real_do_unassigned_access)(cpu, addr, is_write, is_exec, opaque, size); -} - static void (*real_do_transaction_failed)(CPUState *cpu, hwaddr physaddr, vaddr addr, unsigned size, MMUAccessType access_type, @@ -184,9 +172,8 @@ static void mips_jazz_init(MachineState *machine, * However, we can't simply add a global memory region to catch * everything, as this would make all accesses including instruction * accesses be ignored and not raise exceptions. - * So instead we hijack either the do_unassigned_access method or - * the do_transaction_failed method on the CPU, and do not raise exceptions - * for data access. + * So instead we hijack the do_transaction_failed method on the CPU, and + * do not raise exceptions for data access. * * NOTE: this behaviour of raising exceptions for bad instruction * fetches but not bad data accesses was added in commit 54e755588cf1e9 @@ -197,14 +184,8 @@ static void mips_jazz_init(MachineState *machine, * memory region that catches all memory accesses, as we do on Malta. */ cc = CPU_GET_CLASS(cpu); - if (cc->do_unassigned_access) { - real_do_unassigned_access = cc->do_unassigned_access; - cc->do_unassigned_access = mips_jazz_do_unassigned_access; - } - if (cc->do_transaction_failed) { - real_do_transaction_failed = cc->do_transaction_failed; - cc->do_transaction_failed = mips_jazz_do_transaction_failed; - } + real_do_transaction_failed = cc->do_transaction_failed; + cc->do_transaction_failed = mips_jazz_do_transaction_failed; /* allocate RAM */ memory_region_allocate_system_memory(ram, NULL, "mips_jazz.ram", |