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authorMathew Maidment <mathew1800@gmail.com>2018-05-04 18:05:50 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-05-04 18:05:50 +0100
commit100061121c1f69a672ce7bb3e9e3781f8018f9f6 (patch)
tree801936c6f390c722bd06e39760a52afbfe32f3cf /hw/mips/gt64xxx_pci.c
parent6d9c1b8dbb3527258bbc473aa3a9b02c6a86c506 (diff)
target/arm: Correct MPUIR privilege level in register_cp_regs_for_features() conditional case
The duplication of id_tlbtr_reginfo was unintentionally added within 3281af8114c6b8ead02f08b58e3c36895c1ea047 which should have been id_mpuir_reginfo. The effect was that for OMAP and StrongARM CPUs we would incorrectly UNDEF writes to MPUIR rather than NOPing them. Signed-off-by: Mathew Maidment <mathew1800@gmail.com> Message-id: 20180501184933.37609-2-mathew1800@gmail.com [PMM: tweak commit message] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/mips/gt64xxx_pci.c')
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