diff options
| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-01-04 09:35:22 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-01-13 09:31:19 +0100 |
| commit | 65423e6efeac1ee1057870361337c572c941140c (patch) | |
| tree | 36b1c0f16f2bcb9a45a34ef46be7c76609fd7690 /hw/mips/gt64xxx_pci.c | |
| parent | 9f81e43f10496bc225a9bbed3d56a26b9f759fd6 (diff) | |
hw/mips/gt64xxx_pci: Accumulate address space changes
Single registers access in ISD can produce multiple changes
in the address spaces. To reduce computational effort,
accumulate these as a single memory transaction.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230104133935.4639-5-philmd@linaro.org>
Diffstat (limited to 'hw/mips/gt64xxx_pci.c')
| -rw-r--r-- | hw/mips/gt64xxx_pci.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 164866cf3e..65416c7b27 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -282,6 +282,8 @@ static void gt64120_isd_mapping(GT64120State *s) hwaddr start = ((hwaddr)s->regs[GT_ISD] << 21) & 0xFFFE00000ull; hwaddr length = 0x1000; + memory_region_transaction_begin(); + if (s->ISD_length) { memory_region_del_subregion(get_system_memory(), &s->ISD_mem); } @@ -292,10 +294,14 @@ static void gt64120_isd_mapping(GT64120State *s) s->ISD_start = start; s->ISD_length = length; memory_region_add_subregion(get_system_memory(), s->ISD_start, &s->ISD_mem); + + memory_region_transaction_commit(); } static void gt64120_pci_mapping(GT64120State *s) { + memory_region_transaction_begin(); + /* Update PCI0IO mapping */ if ((s->regs[GT_PCI0IOLD] & 0x7f) <= s->regs[GT_PCI0IOHD]) { /* Unmap old IO address */ @@ -354,6 +360,8 @@ static void gt64120_pci_mapping(GT64120State *s) &s->PCI0M1_mem); } } + + memory_region_transaction_commit(); } static int gt64120_post_load(void *opaque, int version_id) |